Variability-Aware Table-Based DC Model of a Dual-Gate Transistor
D. Kasprowicz (Warsaw Univ. of Techn., Poland)
This paper presents a variability-aware table-based model of a transistor. It is shown to accurately capture its transfer curves in the presence of multiple geometry variations. The model has been successfully applied to the VeSFET – a transistor with two independent gates.
Download one page abstract