Three-Stage Nested-Miller Compensated Operational Amplifiers Design Based on Settling Time

H. Aminzadeh (Payame Noor Univ., Iran), M. Rajabzadeh (Quchan Univ. of Advanced Techn., Iran)

In analog signal-processing applications, settling performance of the employed operational amplifiers (opamps) is usually of great importance. Under low-voltage requirements of modern technologies where only a few transistors are allowed to be stacked, three-stage amplifiers are gaining more interest. Unfortunately, design and optimization of three-stage opamps based on settling time still suffer from lack of a comprehensive analysis of the settling behavior and closed-form relations between settling time/ error and other parameters. In this paper, a thorough analysis of the settling response of three-stage nested-Miller-compensated opamps, including linear and non-linear sections, is presented. This analysis leads to a design methodology which determines the circuit requirements for desired settling time/ error. Based on settling time, optimizations in power consumption and area can be performed.