Conference paper

Instructionless General Purpose Coarse-Grained Reconfigurable Processor Performance in Encryption

Z. Mudza, R. Kiełbik (Lodz Univ. of Techn., Poland)

REuP (REconfigurable microProcessor) is a concept ofinstructionless general purpose reconfigurable processor. Such architecture implies that any functionality can be achieved through a variety of solutions not necessarily equivalent to typical CPU implementation, thus application based tests are required to provide its overall performance. The paper presents optimized implementation of TwoFish encryption algorithm in REuP reconfigurable processor. The algorithm is analysed step by step explaining methods of performing individual operations in REuP architecture. Resource utilization and performance estimations are provided and compared to results obtained on typical CPU.

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Receipt of papers:

March 15th, 2024

Notification of acceptance:

April 30th, 2024

Registration opening:

May 1st, 2024

Final paper versions:

May 15th, 2024