Conference paper

Development of SiC MOSFET Electrical Model and Experimental Validation: Improvement and Reduction of Parameter Number

Q.C. Nguyen (IRT Saint-Exupéry, LAAS-CNRS and ICAM Toulouse, France), P. Tounsi (LAAS-CNRS, France), J.-P. Fradin (ICAM Toulouse, France), J.-M. Reynes (IRT Saint-Exupéry and aPSI3D, France)

In this work, a new approach for electrical modeling of Silicon Carbide (SiC) MOSFET is presented. The developed model is inspired from the Curtice model which is using a mathematic function reflecting MOSFET output characteristics. The first simulation results showed good agreement with measurements. Improvement is needed in order to increase model accuracy and to take into account the influence of the junction temperature on device characteristics.

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Receipt of papers:

March 15th, 2024

Notification of acceptance:

April 30th, 2024

Registration opening:

May 1st, 2024

Final paper versions:

May 15th, 2024