Conference paper

Employing an Offset-Cancellation Mechanism to Eliminate Mismatch Effects of the Current Sources in High- Resolution Applications

A. Amini (Sina Bioelectronics Company, Iran)

This paper presents a new reliable method to remove mismatch of the current sources in the current-mode type DACs. For this case, a new dynamic single stage current-mode comparator with an offset cancellation circuit (based on bulk-controlled method) is presented, dependably. It is notable that, the proposed idea is applied on a 4-bit current-mode DAC, simply. As simulation results prove, the proposed structure is capable to provide high-resolution currents for applying on the current-mode DACs. Also, it generates more accurate currents for high-resolution applications such as image sensors and analog to digital converters, etc. The total power consumption of the proposed structure is 140 µW with the power supply of 1.8V, moreover, the active area of the proposed circuit is 30*34µm2. Also, the settling time of the proposed offset cancellation circuit is 1.6 µs. The circuit has been designed in a typical 0.18 µm CMOS process with a power supply of 1.8Vand simulated by HSPICE software using level 49 parameters (BSIM3v3).

Receipt of papers:

March 15th, 2024

Notification of acceptance:

April 30th, 2024

Registration opening:

May 1st, 2024

Final paper versions:

May 15th, 2024