IEEE Region 8 (Europe, Middle East and Africa)
ED Poland Chapter Planned Activity
EDS DL MQ "Nanoelectronics - Technology, Design, Modeling"
An EDS Distinguished Lecturer Mini-Colloquium "Nanoelectronics - Technology, Design, Modeling" will be held in Rzeszow, Poland, on June 26, 2019. The MQ will give an extensive view at numerous aspects of nanoelectronics.
The following experts will take part in the MQ and share their expertise with the audience:
- Prof. Shinichi Takagi (The University of Tokyo) with a lecture "Tunneling FET technology for ultra-low power logic applications"
- Prof. Andrzej Strójwąs (Carnegie Mellon University) with a lecture on the state-of-the art processes and their diagnostics
- Dr. Arkadiusz Malinowski (GlobalFoundries) with a lecture on integration of processes for FinFET-based IC manufacturing
- Dr. Rajiv V. Joshi (DL) (IBM Research Division Yorktown Heights, NY) with a lecture on low-power and/or variability aware IC design
- Prof. Henryk Przewłock (DL) (Institute of Electron Technology, Warsaw) with a lecture on a deep insight into photoelectric measurements of MIS systems
- Prof. Marcelo Pavanello (DL) (Centro Universitario FEI) with a lecture "Performance and modeling of Nanowire-based MOSFETs"
- Dr. Farzan Jazaeri (EPFL) with a lecture on modeling of devices in the ultra-low temperature range
- Prof. Mike Brinson (London Metropolitan University) with a lecture "Equation-Defined template and synthesis driven compact modelling of semiconductor devices"
- Dr. Władek Grabiński (DL) (MOS-AK) with a lecture on theFOSS tools for support of IC modeling and design with special emphasis on Verilog-A standardization