A schedule of the 3rd Training Course on Compact Modeling,
organized as IEEE EDS Mini-Colloquium (http://eds.ieee.org/lectures.html?eid=136)
Co-organizer: |
Institute of Electron Technology, Al.Lotników 32/46, 02-668 Warsaw, Poland |
Technical Program Promotor: |
Lodz University of Technology, Department of Microelectronics and Computer Science ul. Wólczanska 221/223 bd. B18, 90-924 Łódź, Poland |
Date: | June 24, 2015. |
Place: |
Hotel Bulwar (Lejda room) ul. Bulwar Filadelfijski 18, 87-100 Toruń, Poland e-mail: recepcja@hotelbulwar.pl, www: http://www.hotelbulwar.pl/ Tel. +48 56 62 39 400, Fax. +48 56 62 39 401 |
Time |
Duration |
|
9:00 |
0:10 |
Wladek Grabinski, Opening |
9:10 |
0:45 |
Henryk Przewłocki, "Weaknesses and corrections of the classical theory of photoelectric phenomena in the MOS system" |
10:00 |
0:45 |
Juin J.Liou, "Compact Modeling of Junction Failure in Semiconductor Devices Subject to Electrostatic Discharge Stresses" |
10:50 |
0:20 |
Coffee break |
11:10 |
0:45 |
Jean-Michel Sallese, "Modeling Junctionless Field Effect Transistors" |
12:00 |
0:45 |
Mike Brinson, "A unified approach to compact device modelling with the open source packages Qucs/ADMS and MAPP/Octave" |
13:00 |
1:30 |
Lunch |
14:30 |
0:45 |
Benjamin Iniguez, "Physically-Based Compact Modeling of GaN HEMT" |
15:20 |
0:45 |
Wladek Grabinski, "Verilog-A Compact Model Standardization" |
16:10 |
0:45 |
Daniel Tomaszewski, "Compact modeling and statistical modeling for parametric yield improvement" |
17:00 |
|
Wladek Grabinski, Closing |