Conference paper

Low-voltage Quasi-linear Current-to-Voltage Converter for Analog Signal Processing

R. Wojtyna (Univ. Techn. & Life Sciences, Poland)

The paper presents a simple transresistor attractive for on-chip analog-signal-processing. The proposed circuit offers not only a quite good linearity of DC transfer characteristic but, first of all, a relatively low value of its output resistance. This enables a voltage mode operation even if our circuit is loaded by a not necessarily very high resistor. The obtained rather low value of output resistance in our circuit is due to adding to the transresistor-input-stage a simple rail-to-rail voltage follower. To the author’s knowledge, the proposed solution is original and not published yet in the literature. Input stage of the transresistor is built of only 4 MOS transistors and creates a simple quasi-linear current-to-voltage convertor. Output stage of it is built of 9 MOS transistors, plays a role of a very precise and simple rail-to-rail CMOS-pair-based non-standard voltage follower. In respect of simplicity and headroom, our follower is better than conventional OA-based voltage followers. Preliminary simulation results are in a good agreement with the theory presented.

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Receipt of papers:

March 15th, 2024

Notification of acceptance:

April 30th, 2024

Registration opening:

May 1st, 2024

Final paper versions:

May 15th, 2024