Conference paper

A New Current Mode Min-Max Circuit Using CMOS Technology for Fuzzy Applications

R. Khayatzadeh (Istanbul Tech. Univ., Turkey), M. Ghasemzadeh, S. Mahdavi (Urmia Univ., Iran)

In this work a new structure of current mode min-max circuit using 0.18um CMOS standard technology is presented. It is based on cascode current mirror and enjoys 30 NMOS transistors. A 1.8(V) power supply is applied and simulation results are prepared using HSPICE software with level 49 parameters (BSIM3v3). It has noticeable advantages like 0.9 percent error in maximum input signal amplitude, 0.88nS delay, and small chip die size area. To check the functionality of proposed circuit, different simulations have been performed. Also, layout pattern of min-max circuit is prepared by Cadence software. The achieved area of proposed circuit is less than 31um2.

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Receipt of papers:

March 15th, 2024

Notification of acceptance:

April 30th, 2024

Registration opening:

May 1st, 2024

Final paper versions:

May 15th, 2024