A Shared Memory Parameterized and Configurable in FPGA, for Use in Multiprocessor Systems

E. Strollo, A. Trifiletti (Univ. Rome Sapienza, Italy)

Increasingly multi-core architectures are proposed and multiprocessor systems are also realized within the FPGA. The mechanisms for communication between devices are fundamental and influence the feasibility and performance of the system. The main ones are based on the bus, or are based on shared memory, or are based on NoC. The bus communication, widely used for its simplicity of implementation, suffers from the problem of sharing the means of communication. This, in the case of many processors and large amounts of data to be exchanged, is a bottleneck. Furthermore, having to manage access to the bus, the communication of a processor is conditioned by the communications between the other processors and may not be suitable for hard real-time systems. The preferred communication, for versatility and ease of programming, is via a shared memory, which, in fact, you want to imitate in different ways. But a true multiport memory that allows simultaneous access to the same locations, has various manufacturing difficulties. Because more and more FPGAs are replacing ASICs in various fields and there are many proposals for multiprocessor systems in FPGA, also using various soft-core offered by the producers themselves, we want to investigate possible solutions, using programmable logic, to have real shared memory CRCW (Concurrent Read Concurrent Write). The method that we use, to make the shared memory feasible and practically usable, is a targeted configuration of its structure. With a parameterization in FPGA of memory we want to adapt the architecture of communication to the communication needs of the multiprocessor system. So the idea is to try to reduce the required interconnections to share the memory locations between all processors, limiting them strictly to the operational needs of the application. We show the results achieved with implementations in FPGA comparing the occupation of the area and the required resources, trying to figure out if this, which happens to be an even non-trodden path, can lead to viable solutions to current and future needs of multiprocessor communication.