Conference paper

GaN-AlGaN on SiC pHEMT Advanced Design for a Digital Radio Frequency Memory

C. Lessi (National Tech. Unive. Athens, Greece), V. Vallindras, K. Hadjisavva (Hellenic Naval Academy, Greece), E. Karagianni (Hellenic Naval Academy and Hellenic Naval Academy, Greece), G. Deligeorgis, A. Stavrinidis, G. Konstantinidis (Foundation for Research and Techn. Hellas, Creta, Greece), A. Panagopoulos (National Tech. Unive. Athens, Greece)

High-electron-mobility transistor (HEMT) are a type of FET fabricated with a junction between two materials with different band gaps.The most common material that is used in HEMTfabrication is based on the Gallium Arsenidehetero-junction (GaAs-AlGaAs). However, Gallium Nitride (GaN) technology is entering dynamically in the area of transistorfabrication because of the high currents’ control by using low voltages.The main design characteristics will be presented in this paper as well as the advantages of this design. Additionally, based on the heterojuction (GaN/AlGaN) that creates a piezoelectric polarization and so the two-dimensional electron gas (2DEG), a full pHEMT model was designed by using High-electron-mobility transistor (HEMT) is a type of FET fabricated with a junction between two materials with different band gaps. The most common material that is used in HEMT fabrication is based on the Gallium Arsenide hetero-junction (GaAs-AlGaAs). However, Gallium Nitride (GaN) technology is entering dynamically in the area of transistor fabrication because of the high currents’ control by using low voltages. In this paper, a 3D design is presented based on the finger topology. The heterojuction (GaN-AlGaN) creates a piezoelectric polarization and so the two-dimensional electron gas (2DEG), so a full pHEMT model was designed by using Advanced Design System (ADS) software. More specifically, a two-fingers structure is designed in which the two exterior fingers are the source and the one in between is the drain. The transistor size is 160μm length. The small signal model of the designed transistor was created, based on the simulation results. This structure is fabricated and the measured S-parameters are presented.

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Receipt of papers:

March 15th, 2024

Notification of acceptance:

April 30th, 2024

Registration opening:

May 1st, 2024

Final paper versions:

May 15th, 2024