Low-Voltage Low-Power Current-Mode Squaring and Multiplier/Divider Circuits

C.R. Popa (UNSTPB, Romania)

Original designs of a squaring and a multiplier/divider circuits will be presented. The utilization of translinear loops containing pairs of opposite identical transistors and of the current-mode operation strongly reduce the errors introduced by temperature variations and, also the technological-caused errors. The squaring and the multiplier/divider circuits are developed for low-voltage applications, having a supply voltage equal with ±0.4V. The capability of the circuits to operate at extremely low values of the currents allows to obtain a low-power operation for the new proposed squaring and multiplier/divider circuits, decreasing its power consumption to approximately 0.04uW for the squaring circuit and to approximately 0.1uW for the multiplier/divider circuit. SPICE simulations made for 0.18µm TSMC CMOS process confirm the results obtained after the theoretical analysis. The area occupied on silicon by the squaring circuit is approximately 3um2, while the area occupied by the multiplier/divider circuit is approximately 7um2.