ECG Vital Feature Extraction Using Low-Power CMOS Integrated Front-End System

K. Javanmardi (Urmia Univ., Iran), A. Amini (UNIPV, Italy)

This paper presents a low-power CMOS integrated system for precise extraction of ECG vital features, including Q–T intervals, heart rate, and P–R–T wave peaks. The proposed system consists of a low-noise amplifier (LNA) with a variable-gain stage, an 8-bit SAR ADC, and a digital Heart Feature Extraction (HFE) unit. To address biomedical signal challenges, a semi-chopper LNA and an IIR notch filter are employed to suppress 1/f noise and 50/60 Hz power-line interference. Implemented in a 0.18 μm standard CMOS process and verified through HSPICE simulations, the system achieves a total power consumption of 58 μW, making it suitable for wearable healthcare monitoring applications.