A Sub-300-pW Voltage Reference with −227-dB PSR Using ΔVGS and Multi-Loop Regulation

F. Gagliardi (Univ. of Pisa, Italy), I. Nannipieri, S. Contardi (Univ. of Pisa and Sensichips s.r.l., Italy), P. Bruschi, M. Piotto, M. Dei (Univ. of Pisa, Italy)

In this work, we present a single-branch voltage reference with outstanding immunity to supply voltage variations. This is achieved by combining a ΔVGS-based core, responsible for temperature compensation, with a multi-loop regulation approach. The latter technique has been adapted to allow seamless operation within a large supply voltage range, down to 0.4 V, while maximum supply immunity is achieved at 0.8 V. Electrical simulations of a 0.18-μm CMOS design demonstrate power-supply rejection as low as −226.6 dB at dc under 0.8-V supply voltage. Power consumption is below 300 pW, and the temperature coefficient is around 20 ppm/°C between −20 and 80 °C. Performance is robust against random process variations, emulated through Monte Carlo statistical simulations. These findings indicate strong suitability of the proposed circuit for inclusion in low-power microchips subject to low and widely-fluctuating supply voltages.