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Conference paper

Charge-Modulated Conductance and Synaptic Behavior in WSe2/h-BN/Gr van der Waals Floating-Gate Transistors for Nonvolatile Memory

S.-P. Lin (EEE, NYCU, Taiwan)

Neuromorphic hardware requires nonvolatile memory and continuously tunable conductance to emulate synaptic plasticity in biological neural systems. Here, we report a van der Waals floating-gate field-effect transistor (FGFET) based on WSe2/ hexagonal boron nitride (h-BN)/ graphene (Gr) heterostructure and systematically investigate its memory and synaptic characteristics. Charge trapping in the Gr floating gate produces a pronounced memory window, enabling stable and nonvolatile modulation of channel conductance. Under gate-voltage pulse stimulation, the device exhibits excitatory and inhibitory postsynaptic current (EPSC/IPSC)-like responses, with conductance states gradually tuned by pulse amplitude, number, and duration. These results demonstrate that the WSe2/h-BN/Gr floating-gate platform is a promising candidate for compact neuromorphic and optoelectronic synaptic applications.

Receipt of papers:

March 15th, 2026

Notification of acceptance:

April 30th, 2026

Registration opening:

May 2nd, 2026

Final paper versions:

May 15th, 2026