A Low Power, Low Area, Current Sampling Based Sense Amplifier Optimized for RRAM Readout Logic

A. Pawłowski, J. Ślubowski, K. Sobolewski, K. Ber, T. Borejko (IMIO WUT, Poland), P. Wiśniewski (CEZAMAT, Poland), W. Pleskacz (IMIO WUT, Poland)

This work presents a low power, low area, sense amplifier in current sensing enhanced architecture designed for enabling reliable readout of RRAM based devices in standard and differential readout scheme. The proposed circuit can sense currents as low as 50nA at readout voltages as low as 0.3V. The sense amplifier is designed for 130nm CMOS fabrication node and will be incorporated as one of the crucial submodules of RRAM based PUF. To address the security and reliability requirements, additional optimizations against common power line vector attacks are also introduced.