Conference paper

Reducing the Bipolar Junction Transistor Vbe Non-Linearity

V. Bucur, G. Banarie (Analog Devices Inc., Ireland and Univ. Politehnica Bucharest, Romania), S. Marinca, M. Bodea (Univ. Politehnica Bucharest, Romania)

There is an increasing demand for high-performance, low-cost, small footprint, integrated circuit (IC) designs. Most of these designs relies on the Bipolar Junction Transistor (BJT) as a critical building block. The BJT performance is a critical part of the overall IC performance. We are investigating causes of non-linearity in the BJT Vbe from the temperature point of view, especially the biasing type of current relative to temperature dependency (PTAT, CTAT, ZTAT) and proposing a possible solution that will reduce the BJT Vbe nonlinearity from the Typ. 5mV nonlinearity to a Typ. 2uv pp or a 2500 times reduction. Keywords— BJT, Vbe, CTAT, PTAT

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Receipt of papers:

March 15th, 2024

Notification of acceptance:

April 30th, 2024

Registration opening:

May 1st, 2024

Final paper versions:

May 15th, 2024