Low Hardware Complexity Filters for On-Chip Algorithm Used in Air Pollution Sensors for Dense Urban Areas in Smart Cities

Z. Długosz, M. Rajewski (UTP Univ. of Science and Techn., Poland), M. Banach (Poznan Univ. of Techn., Poland), T. Talaśka, R. Długosz (UTP Univ. of Science and Techn., Poland)

The paper presents a method of transistor level implementation of a reconfigurable filter for the application in the algorithm responsible for processing air pollution data. The assumption of the proposed solutions is the realization of the algorithm that uses such filters directly in the wireless sensor, along with other components of such devices. Thanks to this, the amount of data exchanged between the sensors and the base station can be reduced. In the proposed filter structure, a special emphasis was placed on reducing the hardware complexity of the filter. The objective is to reduce the chip area of the overall device. The filter features a modular reconfigurable structure, which allows to achieve different filter orders, with almost linear increase in the hardware complexity. Target application of the proposed solution is in wireless sensors networks (WSN) that consist of large numbers of devices distributed, e.g. in dense urban areas in cities.