Conference paper

Challenges in Performance Improvement of Silicon Systems on Chip in Advanced Nanoelectronics Technology Nodes

A. Malinowski (Globalfoundries, Germany), S.K. Mishra (Globalfoundries, USA)

Speed or clock rate of the first microprocessor released to the market in 1971 was 740 kHz. This microprocessor was intended for calculator application. Continuing increase of microprocessor speed and computing power led to explosion numerous of applications. Five decades later microprocessors speed reached 5 GHz and they have enough computing power leading to such a wonders as artificial intelligence, virtual reality and self-driving autonomous cars which was before only in science fiction domain. However, increase of chip speed is very challenging and it comes with high price. The most straightforward chip speed improvement based on transistor physical dimensions scaling eventually run out of steam. This has led to stress (1990s) followed by strain (2000s) techniques development. When this became insufficient new device structure, FinFET, has been introduced into main stream manufacturing in 2011. However, similarly to the previous approaches now increasing computing power of microprocessors based on FinFET is running out of steam due to difficult technological barriers and integration challenges. Difficulties and challenges outlined in this paper may end era of microprocessor computing power improvement based on classical silicon technology.

Download one page abstract

Receipt of papers:

March 13th, 2020

Notification of acceptance:

May 18th, 2020

Registration opening:

May 20th, 2020

Final paper versions:

June 5th, 2020