Rail to Rail Comparator for SAR ADC in Biomedical Applications

N. ALjehani (King Saud Univ., Saudi Arabia), M. Abbas (King Saud Univ., Saudi Arabia and Assiut Univ., Egypt)

This paper presents a low voltage low power rail to rail common-mode range clocked comparator. The target application of the proposed circuit is an analog to digital converter for biomedical applications. The proposed comparator is composed of two stages which are pre-amplifiers and modified strong-Arm latch. The outputs of NMOS-input and PMOS-input pre-amplifiers are combined by the modified Strong-Arm latch producing rail to rail common-mode range clocked comparator. Adopting TSMC 0.18μm technology, the preamplifier stages were designed to work in weak inversion using gm/ID design methodology. The simulation results show that the preamplifier stage consumes less than 0.275μW using a power supply of 0.75V. The input-referred noise is 17μV, DC gain of and unity gain frequency of the pre-amps are 43.15dB and 300 kHz respectively.