Conference paper

VESTIC: A New IC Manufacturing Paradigm. Present Status and Future Plans

A. Pfitzner (Warsaw Univ. of Techn., Poland)

The VESTIC (Vertical-Slit Transistor based Integrated Circuit) technology is an innovative way to implement very large-scale nanoelectronic integrated systems. The simulation and experimental feasibility studies performed so far indicate that this novel paradigm is an extremely attractive alternative to the existing most advanced technologies based on the structure of the MOS transistor

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Receipt of papers:

March 15th, 2024

Notification of acceptance:

April 30th, 2024

Registration opening:

May 1st, 2024

Final paper versions:

May 15th, 2024