Conference paper

Vertical and Lateral GaN-based Devices for Power Electronics

A. Taube (Łukasiewicz - IMIF, Poland), M. Kamiński (Łukasiewicz - IMIF and Warsaw Univ. of Techn., Poland), M. Ekielski (Łukasiewicz - IMIF, Poland), J. Tarenko, O. Sadowski (Łukasiewicz - IMIF and Warsaw Univ. of Techn., Poland), K. Pągowska, K. Kosiel, R. Kruszka, M. Zadura, E. Brzozowski (Łukasiewicz - IMIF, Poland), R. Kisiel (Warsaw Univ. of Techn., Poland), P. Prystawko, M. Boćkowski, I. Grzegory (IWC PAN, Poland), A. Szerling (Łukasiewicz - IMIF, Poland)

Gallium nitride (GaN), due to its interesting electrophysical properties, such as: wide, direct band gap of 3.4 eV, high electron mobility above 1000 cm^2/Vs, electron saturation velocity approx. 2x10^7 cm/s and a high value of the critical electric field, exceeding 3 MV/cm, is used in power semiconductor devices operating under high voltages and high frequencies. To date, most GaN-based power devices are fabricated on foreign substrates i.e active layers of gallium nitride are grown on another material such as sapphire, silicon or silicon carbide. For this reason, most of such devices are lateral devices in which the current flows parallel to the surface of the semiconductor structure. These are mainly high electron mobilty transistors (HEMTs), utilized an AlGaN/GaN heterostructures with high density (>1x10^13 cm^-2) and high carrier mobility (>1500 cm^2/Vs) two-dimensional electron gas, which act as a channel of the transistor. The possibility of growing HEMT structures on relatively cheap and easily available silicon substrates with a large diameter and the development of CMOS-compatible manufacturing technology enabled the commercialization and mass production of devices based on AlGaN/GaN heterostructures for power electronics. In recent years, significant progress has been made in the development of technology for the production of monocrystalline GaN wafers. High-quality substrates with low dislocation density (below 1x10^6 cm^-2) with a diameter of more than two inches are available on the market. Therefore, it became possible to develop vertical power devices, such as Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) and Schottky and p-i-n diodes, which are the main elements of power electronic systems. One of the advantages of vertical devices over lateral devices is the fact that the increasing the maximum operating voltage does not significantly affect the active area of the devices. In the case of vertical power devices, the theoretical maximum operating voltage is determined by the thickness and doping level of the drift layer, regardless of the geometric dimensions of the device itself. In this work the basic GaN-based semiconductor devices for power electronics and their possible areas of application, will be presented. The results of research work conducted at the Łukasiewicz Research Network - Institute of Microelectronics and Photonics together with partners will also be presented, concerning the design and technology of lateral and vertical GaN-based semiconductor devices. This include development of fabrication technology of normally-off, high-voltage and high power p-GaN gate HEMTs on silicon substrates. Key technological steps will be presented i.e. selective etching of p-GaN layers over AlGaN, deposition of proper passivation layer as well as thermally stable isolation of adjacent devices using selective Fe^+ ion implantation. The measurements of developed normally-off p-GaN gate AlGaN/GaN HEMT power transistors assembled using in-house developed process in TO-220 package will be presented as well. In cooperation with the Institute of High Pressure Physics of the Polish Academy of Sciences, the research on GaN vertical power devices (p-i-n diodes and MOSFETs) was established. A number of technological processes have been developed, including, among others, low-resistance ohmic contacts to Ga-face p-GaN and n-GaN epitaxial layers, N-face backside ohmic contact, beveled mesa structures for p-i-n diodes, vertical sidewall trench etching processes, surface preparation and deposition of gate dielectric layers for vertical MOSFETs. The integration of developed processes into fabrication process flow of vertical power devices is currently underway. The first vertical devices - p-i-n diodes and trench-MOSFET transistors - were fabricated and characterized. This work was supported by the Polish National Centre for Research and Development under agreements nr TECHMATSTRATEG1/346922/4/NCBR/2017 for project “Technologies of semiconductor materials for high power and high frequency electronics” and TECHMATSTRATEG-III/0003/2019 for the project “Complete Vertically Integrated Technological Chain for Vertical GaN-onGaN Power Electronics: From GaN Substrate to Intelligent Energy Bank”, and by the Łukasiewicz Centre under Targeted grants projects: GaNISM - CŁ/0611/2021/DF/DW, GaNSUP - 1/Ł-IEL/CŁ/2022 and GaNLiN - 1/Ł-IMiF/CŁ/2023.

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Receipt of papers:

March 15th, 2023

Notification of acceptance:

April 30th, 2023

Registration opening:

May 15th, 2023

Final paper versions:

May 15th, 2023