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Conference schedule



Day 1: June 25th, 2026 (Thursday)

TimeRoom A
08:30 Conference Opening
Chairmen: Prof. Wojciech Tylman and Prof. Andrzej Pfitzner
08:40 Plenary Session I: General Invited Papers
Chairman: Prof. Wojciech Tylman

Evolving Engineering Education
T.D. Drysdale (The Univ. of Edinburgh, UK)

TSRI Platform for Advanced Packaging and Silicon Photonics - Ecosystem for Industry–Academia–Research Collaboration
C.-N. Liu (Taiwan Semiconductor Research Inst., Taiwan)

09:30 Vendor Session: Conference Partners' Presentations
Chairman: Prof. Wojciech Tylman

Openchip Presentation
P. Kołodziej (Openchip, Poland)

Chimera Technology Presentation
A. Lord (Chimera Technology, Czech Republic)

10:40 Coffee Break
11:00 Session 1 (Part 1): Design of Integrated Circuits and Microsystems

A 400 fs Resolution Vernier TDC with Adaptive Voltage Scaling
D. Manuel (Univ. Nova de Lisboa, Portugal), L. Rodovalho, H. Gonçalves (Synopsys, Portugal), L. Oliveira (Univ. Nova de Lisboa, Portugal)

A CMOS Double Balanced Mixer Using Current Bleeding and Negative Impedance Techniques
S. Kumar, H. Shrimali (Indian Inst. of Techn. Mandi, India)

A Design Strategy based on gm/ID Method for Critically Damped Ring Amplifiers
J. Soares, N. Paulino (NOVA School of Science and Techn., Portugal), M. Rodrigues (Renesas, Portugal)

A Low-Power Compact HV TX/RX Switch Composed of Three HV-MOS Transistors for Ultrasound Imaging Front-End ASICs
A. Amini (Univ. of Pavia, Italy)

A Multi-PLL Approach to Low-Spur, Low-Jitter Frequency Synthesis for Millimeter-Wave Bands
F. Herzel, N. Maletic, C. Carta, G. Fischer (IHP Frankfurt (Oder), Germany)

13:00 Lunch
14:00 Session 1 (Part 2)

A Sub-300-pW Voltage Reference with −227-dB PSR Using ΔVGS and Multi-Loop Regulation
F. Gagliardi (Univ. of Pisa, Italy), I. Nannipieri, S. Contardi (Univ. of Pisa and Sensichips s.r.l., Italy), P. Bruschi, M. Piotto, M. Dei (Univ. of Pisa, Italy)

An Active-Passive 2nd-order CT Sigma Delta Using Single FIR Feedback for Battery Monitoring
P. Peres, N. Paulino (NOVA School of Science and Techn., Portugal), B. Nowacki (Renesas, Portugal)

An Asynchronous Circuit for Pattern Comparison Based on Programmable Gates and Asynchronous Incrementers and Decrementers
M. Kolasa (Bydgoszcz Univ. of Science and Techn., Poland), M. Długosz (Poznan Univ. of Techn., Poland), T. Talaśka (Bydgoszcz Univ. of Science and Techn. and Gdansk Univ. of Techn., Poland), R. Długosz (Bydgoszcz Univ. of Science and Techn. and Aptiv Services, Poland)

An Integrated Phase Noise Generator for Sensitivity Measurements on Superconducting Qubits
F. Herzel, G. Fischer, C. Carta (IHP Frankfurt (Oder), Germany)

15:20 Coffee Break
15:40 Session 1 (Part 3)

An LDO with 1 A at 1 Ω Load, 3.95 fs of FoM and 70 dB PSRR for TEC Controller Applications
A. Kumar, H. Shrimali (Indian Inst. of Techn. Mandi, India)

Architectural Evaluation of Iterative and Unrolled AES-128 in 45 nm Using an Open-Source Flow
D. Santos, J. Cabacinho (NOVA FCT - CTS/UNINOVA, Portugal), J. Casaleiro (ISEL - CTS/UNINOVA, Portugal), L. Oliveira (NOVA FCT - CTS/UNINOVA, Portugal)

Design of a Soft-processor for Educational Purposes
M. Heimowski, P. Buluk, A. Bruździak, J. Komoszewski, B. Pankiewicz (Gdansk Univ. of Techn., Poland)

Digital Signal Tuning System for MEMS Excitation
P. Wiegand, A.A. Ahmad, B. Spetzler, R. Rieger (Kiel Univ., Germany)

19:00 Welcome Party
TimeRoom B
10:40 Coffee Break
11:00 Session 2: Analysis and Modelling of ICs and Microsystems

An Overview of the Latest Quantum Technologies and Their Accessibility for Science
M. Zubert, P. Duniec, K. Hałagan (Lodz Univ. of Techn., Poland)

Comparison of BJT and MOSFET Astable Multivibrators: A Theoretical and Simulation Study for Teaching Fundamentals of Electronics
R. Długosz (Bydgoszcz Univ. of Science and Techn., Poland), A. Dąbrowski, P. Pawłowski (Poznan Univ. of Techn., Poland)

Comprehensive Harmonic Domain Simulation of a Thermally Driven MEMS Accelerometer with Full Noise Characterization
M. Szermer, J. Nazdrowicz (Lodz Univ. of Techn., Poland), M. Tuszyńska (Cracow Univ. of Techn., Poland)

Realisation of Simple Logic Circuits Using a Quantum Processing Unit - A Case Study
M. Zubert, P. Duniec, K. Hałagan (Lodz Univ. of Techn., Poland)

The Impact of Chip Scaling on the Security of Data Storage in DRAM
J. Warmbier, M. Szymkowiak, P. Pawłowski (Poznan Univ. of Techn., Poland)

13:00 Lunch
14:00 Session 3: Power Electronics

Numerical Modeling-Enabled High-Temperature Characterization of Boron Doped Diamond Ohmic Contact and Material Resistivity Using a Simplified TLM Structure
M. Pietrzyk (CEA en Occitanie, France), D. Trémouilles (LAAS-CNRS, France), E. Marcault (CEA en Occitanie, France), K. Isoird (LAAS-CNRS, France)

Reliability-Oriented TCAD Modelling of Low-Voltage Schottky p-GaN Gate Power HEMT Using CRSS(VDS) Curve as a Relevant Trapping Diagnosis
N. Essobai Meftah (LAAS-CNRS, LAPLACE Université de Toulouse, CNRS, France), D. Trémouilles (LAAS-CNRS, France), F. Richardeau (LAPLACE, Université de Toulouse, CNRS, France, France)

Tools for Analyzing the Daily Performance of a Photo-Voltaic Installation Containing Bifacial Modules
A. Urbanowicz, K. Górecki (Gdynia Maritime Univ., Poland)

15:20 Coffee Break
15:40 Session 5: Embedded Systems

Evolution of Photonic Infrastructure in the IOWN Concept: Architecture, Experimental Results, and Real‑Time Applications
J. Nazdrowicz (Lodz Univ. of Techn./Fujitsu, Poland), S. Siminski (Fujitsu, Poland, Poland)

PCB Modeled by a Lossy Three-Conductor Transmission Line
G. Angelov (Tech. Univ. Sofia, Bulgaria)

Reliability Analysis of SAN Topologies under Variable Workloads Using Hybrid Simulation Techniques
J. Nazdrowicz (Lodz Univ. of Techn., Poland), M. Tuszyńska (Cracow Univ. of Techn., Poland)

Study of the Ethernet-APL Communication Standard: A New Revolution for Industrial Automation
A. Baratella Lugli (INATEL, Brazil), M. Santos Moreira (UNIFEI, Brazil), J. Arlindo Pinto Azevedo (INATEL, Brazil), T. Cléber Pimenta (UNIFEI, Brazil)

19:00 Welcome Party
TimeRoom C
10:40 Coffee Break
11:00 Special Session 3: Open-source Silicon Ecosystem
Chairman: Dr. Władysław Grabiński

OpenPDK as a Strategic FOSS IC Design Enabler
W. Grabiński (GMC Suisse, Switzerland), K. Herman, S. Andreev, R. Scholz (IHP Microelectronics GmbH, Germany)

Performace Comparision of Leading-Zero Anticipators Using Free PDKs
K. Mielcarek (Univ. of Zielona Góra, Poland), F. Moszczuk (, Poland)

Teaching Integrated Circuit Design with Open Source Electronic Design Automation Tools and Open Process Design Kits
P. Mierzwiński, B. Dec (Warsaw Univ. of Techn., Poland)

13:00 Lunch
14:00 Special Session 2: FAMES Pilot Line Highlights - Current Developments in FD SOI PDK and RRAM Applications
Chairman: Prof. Witold Pleskacz

A Pathfinding PDK toward 10nm FDSOI Technology
O. Billoint (CEA-Leti, France)

RRAM Physical Unclonable Functions: Compact Modeling, Array Design, and Optimal Control Schemes for Security Applications
K. Ber (IMIO WUT, Poland), P. Wiśniewski, P. Jeżak, A. Małkowski (CEZAMAT, Poland), K. Sobolewski, A. Pawłowski, J. Ślubowski (IMIO WUT, Poland), M. Jarosik (CEZAMAT, Poland), T. Borejko (IMiO, Poland), W. Pleskacz (IMIO WUT, Poland)

A Low-area, Digitally Controlled Low Dropout Regulator with Calibration Logic Optimized for RRAM Control
J. Ślubowski, A. Pawłowski, K. Sobolewski, K. Ber, T. Borejko (IMIO WUT, Poland), P. Wiśniewski (CEZAMAT, Poland), W. Pleskacz (IMIO WUT, Poland)

A Low Power, Low Area, Current Sampling Based Sense Amplifier Optimized for RRAM Readout Logic
A. Pawłowski, J. Ślubowski, K. Sobolewski, K. Ber, T. Borejko (IMIO WUT, Poland), P. Wiśniewski (CEZAMAT, Poland), W. Pleskacz (IMIO WUT, Poland)

15:20 Coffee Break
15:40 Session 7: Medical Applications

A Low-Power Low-Offset DAC-Less LC-ADC for Biomedical Signal Acquisition
F. Modarresi (Mahabad, Iran), A. Amini (UNIPV, Italy)

Comparison of EWT and OVMD Techniques for Left and Right Hand Motor Imagery Classification in EEG Signals
P. Zych, P. Śniatała (Poznan Univ. of Techn., Poland)

Design of a Neurorehabilitation System for Patients with Parkinson's Disease, with a Focus on Therapy outside the Clinical Setting
M. Fechner (Poznan Univ. of Techn., Poland), E. Kozielewska-Zwierska, A. Krawczyński (Poznan Univ. of Medical Sciences, Poland)

ECG Vital Feature Extraction Using Low-Power CMOS Integrated Front-End System
K. Javanmardi (Urmia Univ., Iran), A. Amini (UNIPV, Italy)

Fast-Recovery Capacitive ECG Front-End Based on Reverse-Connected Zener Diodes
Z. Sajadi, R. Rieger (Faculty of Engineering Christian-Albrechts-Universität zu Kiel Kiel, Germany, Germany)

19:00 Welcome Party

Day 2: June 26th, 2026 (Friday)

TimeRoom A
08:30 Plenary Session II: General Invited Papers
09:40 Session 1 (Part 4): Design of Integrated Circuits and Microsystems

Implementation of a Universal IP CORDIC Algorithm in Serial and Parallel Architectures
I. Cintra, G. Piedade, L. Pires, N. Souza, R. Macedo, M. Morais, C. Cunha, L. Souza, E. Pereira, F. Rocha, F. Portelinha (INATEL, Brazil), T. Pimenta (Univ. Federal de Itajuba, Brazil)

IP Release and Cross-Foundry Design Migration for 3D-MRAM Technology
Q. Zhu (International Technological Univ., USA)

Low Power Low Phase Noise Stacked Quadrature Ring Oscillator
D. Novais, J. Santa-Rita, L. Oliveira, J. Oliveira (NOVA School of Science and Techn., Portugal), J. Casaleiro (Inst. Superior de Engenharia de Lisboa, Portugal)

Low-Voltage Low-Power Current-Mode Squaring and Multiplier/Divider Circuits
C.R. Popa (UNSTPB, Romania)

11:00 Coffee Break
11:20 Session 1 (Part 5): Design of Integrated Circuits and Microsystems

Memory Cost Analysis for Sequential Logic Locking FSMLock
J. Evans, M. Łukowiak (Rochester Inst. of Techn., USA)

QoE-Aware Switch Architecture for MPEG-2 Transport Stream Digital TV Broadcast
M. Albuquerque, M. Santos, E. Lima (Inatel, Brazil), J. Oliveira Filho (Cadence, Brazil), E. Pereira, L. Souza, F. Rocha, F. Portelinha Junior (Inatel, Brazil), T. Pimenta (UNIFEI, Brazil)

RC Time-Constant Calibration Scheme Using a DPLL
J.P. Carvalho, N. Paulino (NOVA School of Science and Techn., Portugal), B. Nowacki (Renesas, Portugal)

Single-ended to Differential Mode Voltage-to-Current and Current-to-Voltage Converter in High Voltage SOI Technology
M. Jankowski (Lodz Univ. of Techn., Poland)

13:00 Lunch
14:00 Tourist Activities
19:00 Closing Ceremony & Conference Banquet
TimeRoom B
09:40 Session 4: Signal Processing

Analysis of Multivariate Industrial Process Data for Quality Pattern Detection in Masterbatch Coloring
L. Hisgen, T. Kubik (NanoP, THM University of Applied Sciences, Germany), S. Garbe (G.E. Habich Farben GmbH, Germany), J. Fischer (superus Datenmanagement GmbH, Germany), A. Kloes (NanoP, THM University of Applied Sciences, Germany), B. Iniguez (DEEEA, Universitat Rovira i Virgili, Spain), M. Schwarz (NanoP, THM University of Applied Sciences, Germany)

Envelope Identification Method for Guitar Amplifier Modelling with Wiener-Hammerstein Models
T. Fernandes (NOVA School of Science and Technology, Portugal), N. Paulino (UNINOVA-CTS ,NOVA School of Science and Technology, Portugal)

One Crossbar, Two Functions: Analogue Image Obfuscation and Feature Extraction via Memristors
P. Janiszyn, A. Wąsiak-Maciejak, P. Sitarz, T. Matusiak (SEMIQA, Poland)

Readout Board for the CBM Silicon Tracking System: Design Constraints, Powering Concept and Functional Validation
P. Semeniuk (AGH University of Krakow, Poland), J. Lehnert, R. Kapell (GSI Helmholtzzentrum für Schwerionenforschung GmbH, Germany)

11:00 Coffee Break
11:20 Session 7: Artificial Intelligence in Electronic Systems

Application of Large-Scale Foundation Models and Multimodal Fusion for Stress Detection in Glider Pilots Under Real-World Flight Conditions
A. Wolszczak (Poznan Univ. of Techn., Poland), M. De Marsico (Sapienza Univ. of Rome, Italy)

Design of a Gaussian Activation Function Generator for Neural Network Applications
C.R. Popa (Polytech. Univ. Bucharest, Romania)

Hardware Implementation of a Bfloat16 Exponential Function for Softmax Computation
R. Feiglewicz, A. Kos (AGH University of Krakow, Poland)

ML-Based Error Mitigation Approach for Overcoming NISQ Hardware Constraints in Fermionic Nanoelectronic Simulations
M. Przygocki, R. Kotas, M. Zubert (Lodz Univ. of Techn., Poland)

13:00 Lunch
14:00 Tourist Activities
19:00 Closing Ceremony & Conference Banquet
TimeRoom C
09:40 Special Session 1 (Part 1): Advances in Smart Electronics for AI and Future Technologies
Chairman: Prof. Chih-Wen Lu

A 30 μW 2.4-GHz LNA With 5.6 dB NF Exploiting Trifilar Transformer Coupling for Smart AIoT Electronics
K.-C. Tai, K.-W. Cheng (National Cheng Kung University, Taiwan)

A Nonlinear OTA Simulation Model for the Design of a Switched-Capacitor DSM
C.-Y. Yao, J.-Y. Wu (National Taiwan Univ. of Science and Techn., Taiwan)

Charge-Modulated Conductance and Synaptic Behavior in WSe2/h-BN/Gr van der Waals Floating-Gate Transistors for Nonvolatile Memory
S.-P. Lin (EEE, NYCU, Taiwan)

Leveraging Semiconductor Eco-systems to MEMS
W. Fang (National Tsing Hua Univ., Taiwan)

11:00 Coffee Break
11:20 Special Session 1 (Part 2): Advances in Smart Electronics for AI and Future Technologies
Chairman: Prof. Chia-Yu Yao

MEMS-PMU Co-Simulation of an Electrostatic Energy Harvesting Interface for Battery-Free IoT Devices
Y.-Y. Huang (Institute of Electronics, NYCU, Taiwan), M. Babka, J. Luci, V. Janicek (Czech Technical Univ., Czech Republic), Y.-T. Liao (Department of Electronics and Electrical Engineering, NYCU, Taiwan), P.-H. Hsieh (Department of Electrical Engineering, NTHU, Taiwan), P.-H. Chen (Institute of Electronics, NYCU, Taiwan)

Review of High-PPI Micro-LED Display Drivers with Current-Mode PWM and Compact Pixel Circuits for Near-Eye Applications
T.-H. Lo (National Tsing Hua Univ., Taiwan), C.-W. Lu (NTHU, Taiwan)

Secure IoT Platform with Advanced Key Generation and Robust Cybersecurity
L.-Y. Chiou (Academy of Innovative Semiconductor and Sustainable Manufacturing, Taiwan), R. Holý (Czech Technical Univ., Czech Republic), Z.-F. Chen (National Cheng Kung Univ., Taiwan), J.Q. Choy (National Cheng Kung Univ., Malaysia), H.-Y. Chen, C.-Y. Chang, Y.-Y. Shen (National Cheng Kung Univ., Taiwan), M. Vaniš, M. Šrotýř (Czech Technical Univ., Czech Republic)

Simulation Analysis of a ±180° Phase Shifter Circuit Model
C.K. Lin, D.B. Lin (National Taiwan Univ. of Science and Techn., Taiwan)

13:00 Lunch
14:00 Tourist Activities
19:00 Closing Ceremony & Conference Banquet
TimeRoom D
11:00 Coffee Break
11:20 Special Session 4: UAV as a Platform for Various Applications
Chairman: Prof. Paweł Śniatała

Enhancing UAV Data Security Using Lightweight Cryptography Module
S. Baliński, P. Śniatała, M. Sobieraj (Poznan Univ. of Techn., Poland), J. Xie (San Diego State Univ., USA)

P4-Programmable Raspberry Pi Nodes for Multi-Interface Edge Networking in Networked Airborne Computing
J. Piechocka, J. Grzelski, M. Żal (Poznan Univ. of Techn., Poland)

Topology-Aware Offloading of DAG Tasks for Multi-UAV-Assisted Mobile Edge Computing
K. Ma, J. Xie, S. Ren (San Diego State Univ., USA), P. Śniatała (Poznan Univ. of Techn., USA)

Towards Autonomous Detection and Hot Patching of Binary Vulnerabilities in UAV Software
I. Stopochkina, O. Novikov, M. Ilin, A. Voitsekhovskyi (Igor Sikorsky KPI, Ukraine)

13:00 Lunch
14:00 Tourist Activities
19:00 Closing Ceremony & Conference Banquet

Receipt of papers:

March 15th, 2026

Notification of acceptance:

April 30th, 2026

Registration opening:

May 2nd, 2026

Final paper versions:

May 15th, 2026