Conference schedule



Day 1: June 22nd, 2017 (Thursday)

TimeRoom A
08:15 Conference Opening
08:30 Plenary Session I: General Invited Papers

Introduction of Analog Front End IC Used in Sensing System
Y. Shimeno (New Japan Radio Co., Ltd., Japan)

Emerging Sigma-Delta Modulation Techniques for an Efficient Digitization in the Internet of Things
J. de la Rosa (IMSE-CNM (CSIC/Universidad de Sevilla), Spain)

09:30 Vendor Session

ASCENT - Access to European Nanoelectronics Infrastructure
J. Greer (ASCENT Co-ordinator, Tyndall National Inst., Ireland)

10:00 Session 1 (Part 1): Design of Integrated Circuits and Microsystems

A 4.5GHz, 64-bit Digital Comparator in 0.18µm CMOS Technology
M. Ghasemzadeh, K. Hadidi, A. Amini (Urmia Univ., Iran)

A Bidirectional Front-end with Bandwidth Control for Actuation and Read-out of MEMS Resonating Sensors
L. Marchetti, Y. Berg, M. Azadmehr (Univ. College of Southeast Norway, Norway)

A Low-Jitter, Full-Differential PLL in 0.18µm CMOS Technology
F. Modarresi, M. Ghasemzadeh, A. Amini, M. Mazlumi (Urmia Univ., Iran)

11:00 Coffee Break
11:20 Session 1 (Part 2): Design of Integrated Circuits and Microsystems

A Low-Power, High-Speed, Analog Fully Programmable Multi-Shaped Fuzzy Membership Function Generator
O. Kahourian, S. Ghasemzadeh (Urmia Univ., Iran)

A Method to Manage Unknown Values Generation and Propagation During Gate Level Simulations of Multi-Clock Digital Circuits
A. Łuczyk (Warsaw Univ. of Techn., Poland)

A Novel APS Pixel Level Rearrangement to Increase the Fill Factor and SNR in 0.35µm CMOS Technology
A. Baradaran Rezaeii, F. Noruzpur, S. Mahdavi (Urmia Graduate Inst., Iran)

Single Photon Counting Integrated Circuit Operating with CdTe Pixel Detector
P. Maj, P. Gryboś, P. Kmon, R. Szczygieł (AGH Univ. of Science and Techn., Poland)

13:00 Lunch
14:00 Session 1 (Part 3): Design of Integrated Circuits and Microsystems

A Novel Online Offset-Cancellation Mechanism in a Low-Power 6-Bit 2GS/s Flash-ADC
A. Amini, A. Baradaranrezaeii, T. Aspokeh, F. Modarresi, M. Ghafourzadeh (Urumi Graduate Inst., Iran)

An Analog Approach in the Implementation of the Digital Systems for High-Speed Applications
A. Baradaranrezaeii, M. Ghafourzadeh (Urumi Graduate Inst., Iran)

An Embedded Charge Pump for a Zener-Based Voltage Reference Compensated Using a ∆VBE Stack
V. Bucur, G. Banarie (Analog Devices Inc., Ireland), S. Marinca, M. Bodea (SD-ETTI, UPB, Romania)

An Extendable Global Clock High-Speed Binary Counter Compatible with the FPGA CLBs
S. Kazeminia (Urmia Univ. Tech., Iran), M. Ghafourzadeh (Urumi Graduate Inst., Iran)

15:20 Coffee Break
15:40 Session 1 (Part 4): Design of Integrated Circuits and Microsystems

Application of the Maximum Weighted Matching to Quantum Cost Reduction in Reversible Circuits
J. Jegier (Orange Labs, Poland), P. Kerntopf (Univ. Lodz, Poland)

Automated Diagnosis of HV/LV and Floating Gate Faults in VLSI Design
Q. Zhu (ITU, USA)

Biasing Potentials Monitoring Circuit for Multichannel Radiation Imaging ASIC In-system Diagnostics
W. Zubrzycka, K. Kasinski (AGH Univ. of Science and Techn., Poland)

Design of 4 Gbps SLVS-type Transmitter in 55 nm CMOS
Ł.A. Kadłubowski, P. Kmon (AGH Univ. of Science and Techn., Poland)

19:00 Welcome Party
TimeRoom B
10:00 Session 7: Signal Processing

Correlational and Regressive Analysis of the Relationship between Tongue and Lips Motion - An EMA and Video Study of Selected Polish Speech Sounds
R. Wielgat, Ł. Mik (State Higher Vocational School in Tarnow, Poland), A. Lorenc (Warsaw Univ., Poland)

New Network Structures of Reconfigurable Fractional-order PID Regulators with DVCC
J. Petrzela (Brno Univ. of Techn., Czech Republic)

Statistical Analysis of Periodically Non-stationary Oscillations for Unknown Period
I. Javorskyj (Bydgoszcz UTP, NAS Ukraine, Poland), R. Yuzefovych, I. Matsko (NAS Ukraine, Ukraine), Z. Zakrzewski, J. Majewski (Bydgoszcz UTP, Poland)

11:00 Coffee Break
11:20 Session 5 & 8: Testing and Reliability & Embedded Systems

A C++ Shared-Memory Ring-Buffer Framework for Large-Scale Data Acquisition Systems
R. Ingles (Lodz Univ. of Techn., El Salvador), M. Orlikowski, A. Napieralski (Lodz Univ. of Techn., Poland)

Automated Software-Based Self-Test Generation for Microprocessors
A. Jasnetski, R. Ubar, A. Tsertov (Tallinn Univ. of Techn., Estonia)

CloudBus Protocol Hardware Multi-Converter Gateway for Distributed Embedded Systems
K. Krzywicki, A. Barkalov, G. Andrzejewski, L. Titarenko, M. Kolopienczyk (Univ. Zielona Gora, Poland)

Development of the Sensor Network for Building Technologies
D. Obrębski, M. Zbieć (Institute of Electron Techn., Poland)

Instructionless General Purpose Coarse-grained Reconfigurable Processor Performance in Encryption
Z. Mudza, R. Kiełbik (Lodz Univ. of Techn., Poland)

13:00 Lunch
14:00 Session 2 (Part 1): Thermal Issues in Microelectronics

A Notebook Arrangement in Aspect of Throughput Increase
A. Samake, P. Kocanda, A. Kos (AGH Univ. of Science and Techn., Poland)

Compact Model of Microprocessor Cooling System Based on Ambient Circumstanes
P. Fluder, P. Marzec, A. Kos (AGH Univ. of Science and Techn., Poland)

Compact Thermal Model of Planar Transformers
K. Górecki, K. Górski (Gdynia Maritime Univ., Poland)

Comparative Analysis of Compact Thermal Models Generated from Measured Thermal Responses and Detailed Thermal Models
T. Raszkowski, A. Samson, T. Torzewicz, P. Zając, M. Janicki, M. Zubert, A. Napieralski (Lodz Univ. of Techn., Poland)

15:20 Coffee Break
15:40 Session 2 (Part 2): Thermal Issues in Microelectronics

Modelling the Influence of Weather Conditions on Properties of the Photovoltaic Installation
K. Górecki, J. Dąbrowski, E. Krac, J. Zarębski (Gdynia Maritime Univ., Poland)

Optimisation of Ivy Bridge Topography
A. Samake, P. Kocanda, A. Kos (AGH Univ. of Science and Techn., Poland)

Oscillatory Behaviour of Transient Thermal Problems in Microelectronics
G. De Mey (Univ. Gent, Belgium), B. Więcek (Lodz Univ. of Techn., Poland), C. Hertleer (Univ. Gent, Belgium), L. Van Langenhove (Univ. Ghent, Belgium), V. Chatziathanassiou (Aristotle Univ. of Thessaloniki, Greece), M. Loniewski, H. Madura (Military Univ. of Techn., Poland)

Thermal Coupling Phenomenon in ICs Cooled by Integrated Microchannels
P. Zając, C. Maj, W. Zabierowski, A. Napieralski (Lodz Univ. of Techn., Poland)

19:00 Welcome Party
TimeRoom C
10:00 Special Session I (Part 1): New Trend of Analog Systems
Chairman: Prof. Toshihiko Hamasaki

Experimental Study of the Oscillation Mode of the Coupled Oscillator ORIGAMI for TDC
S. Kozuki (Kanagawa Univ., Japan), N. Retdian (Shibaura Inst. of Techn., Japan), T. Shima (Kanagawa Univ., Japan)

A Simple Current Reference with Low Sensitivity to Supply Voltage and Temperature
T. Abe, H. Tanimoto, S. Yoshizawa (Kitami Inst. of Techn., Japan)

11:00 Coffee Break
11:20 Special Session I (Part 2): New Trend of Analog Systems
Chairman: Prof. Hiroki Sato

Improvement Technique of Tuning Range for Local-Feedback MOS Transconductor
T. Ohbuchi, F. Matsumoto (National Defense Academy, Japan)

Applying Negative Feedback to Improve Linearity and Input Property of Analog CMOS Transresistor
R. Wojtyna (Univ. Techn. & Life Sciences, Poland)

Self-calibrated Analog-Front-End Circuitry for Ultra Low Power Strain Sensors
D. Kuramoto, T. Hamasaki (Hiroshima Inst. of Techn., Japan)

13:00 Lunch
14:00 Special Session II (Part 1): Compact Modeling for Characterization and Design of CMOS
Chairman: Dr. Daniel Tomaszewski

Simulation Framework for Barrier Lowering in Schottky Barrier MOSFETs
M. Schwarz (Robert Bosch GmbH, Germany), J.P. Snyder (JCap, LLC, USA), T. Krauss, U. Schwalke (Tech. Univ. Darmstadt, Germany), L.E. Calvet (Univ. Paris-Sud, France), A. Kloes (Tech. Hochschule Mittelhessen, Germany)

Improvements in Qucs-S Equation-Defined Modelling of Semiconductor Devices and IC’s
M. Brinson (London Metropolitan Univ., UK), V. Kuznetsov (Bauman Moscow Tech. Univ., Russia)

Variability-Aware Table-Based DC Model of a Dual-Gate Transistor
D. Kasprowicz (Warsaw Univ. of Techn., Poland)

15:20 Coffee Break
15:40 Special Session II (Part 2): Compact Modeling for Characterization and Design of CMOS
Chairman: Dr. Mike Schwarz

Analytical Modeling of RDF Effects on the Threshold Voltage in Short-Channel Double-Gate MOSFETs
M. Graef, F. Hain, F. Hosenfeld, F. Horst, A. Farokhnejad (THM Giessen, Germany), B. Iniguez (URV Tarragona, Spain), A. Kloes (THM Giessen, Germany)

Non-Iterative NEGF Based Model for Band-to-Band Tunneling Current in DG TFETs
F. Hosenfeld, F. Horst, A. Kloes (Tech. Hochschule Mittelhessen, Germany), B. Iniguez, F. Lime (Univ. Rovira i Virgili, Spain)

Electrical Characterization of Different Types of Transistors Fabricated in VeSTIC Process
G. Głuszko, D. Tomaszewski, K. Domański (Institute of Electron Techn., Poland)

A Test Structure for Characteriation of the Shallow Piezoresistor-based Strain Sensors
H. Hara, G. Głuszko (Instytut Technologii Elektronowej, Poland), D. Tomaszewski (Institute of Electron Techn., Poland)

19:00 Welcome Party

Day 2: June 23rd, 2017 (Friday)

TimeRoom A
08:30 Plenary Session II: General Invited Papers

Digitally-Assisted Analog-to-Digital Converters in Deep-Nanoscale CMOS
J. Goes (Univ. Nova de Lisboa, Portugal)

High-Performance Silicon Photonics Platform for Low-Power Photonic Integrated Circuits
T. Mogami (PETRA, Japan), T. Horikawa (PETRA and AIST, Japan), K. Kinoshita (PETRA, Japan)

09:35 Session 1 (Part 5): Design of Integrated Circuits and Microsystems

Design of Memory Subsystem for Wide Input Data Range in the SALT ASIC
K. Świentek, M. Banachowicz (AGH Univ. of Science and Techn., Poland)

FPGA Implementation of the Multiplication Operation in the Multiple-Precision Arithmetic
K. Rudnicki (Brightelligence Inc., UK), T. Stefanski (Gdansk Univ. Techn., Poland)

Implementation of a Toffoli Gate for use in CMOS Processes to Realize Complex Reversible Circuits
A. Rauchenecker, T. Ostermann, R. Wille (JKU, Austria)

Performance Estimation of Lattice Boltzmann Method Implementation in ARUZ
G. Jabłoński, J. Kupis (Lodz Univ. of Techn., Poland)

10:55 Coffee Break
11:15 Session 1 (Part 6): Design of Integrated Circuits and Microsystems

Low Frequency CMOS Two-Integrator Oscillator for IoT Applications
E. Mendes, J. Oliveira, L. Oliveira (Univ. Nova de Lisboa, Portugal)

Microstrip and Gas Electron Multiplier Readout ASIC for Physics Experiment at FAIR
K. Kasiński, W. Zubrzycka, R. Szczygieł (AGH Univ. of Science and Techn., Poland)

Designing HFPGA-based FSMs with Counters
A. Barkalov, L. Titarenko (Univ. Zielona Gora, Poland), J. Bieganowski (Univ. Zielona Góra, Poland)

Designing HFPGA-based Mealy FSMs with Transformation of Output Functions
K. Mielcarek, A. Barkalov, L. Titarenko (Univ. Zielona Gora, Poland)

13:00 Lunch
14:00 Tourist Activities
TimeRoom B
09:35 Session 3 (Part 1): Analysis and Modelling of ICs and Microsystems

A New Fast Rail-to-Rail Continuous-time Common-Mode Feedback Circuit
S. Mahdavi, F. Noruzpur (Urmia Graduate Inst., Iran), E. Ghadimi (Islamic Azad Univ., Iran), T. Moradi Khanshan (Urmia University, Iran)

Lumped Parameter Model of a Capacitive Micro-machined Ultrasound Transducer
O. Chkalov, O. Beznosyk, B. Kyriusha, O. Finogenov (Kyiv Poytech. Inst., Ukraine)

Thermal and Power Delivery Considerations of the 65k Pixel 3-D Integrated Radiation Imaging Module with Through-Silicon Vias
K. Kasiński (AGH Univ. of Science and Techn., Poland)

10:55 Coffee Break
11:15 Session 3 (Part 2): Analysis and Modelling of ICs and Microsystems

New Time-domain Conditioning Circuit for Resistive Sensor: Behavioral Modelling for Simulation and Optimization
E. Chabchoub (CEA_LETI, France), F. Badest (CEA, France), M. Masmoudi (METS-ENIS, Tunisia), F. Mailly, P. Nouet (LIRMM, France)

On Power ESD Test of Integrated Circuits
T. Ostermann (Univ. Linz, Austria)

Simulations and Analysis of Microgyroscope Response in Drive and Sense Directions
J. Nazdrowicz (Lodz Univ. of Techn., Poland)

SIMULINK and COMSOL Software Application for Modeling and Simulation MEMS Accelerometer
J. Nazdrowicz (Lodz Univ. of Techn., Poland)

13:00 Lunch
14:00 Tourist Activities
TimeRoom C
09:35 Special Session I (Part 3): New Trend of Analog Systems
Chairman: Prof. Akira Yasuda

Integrated CMOS ADC - Tutorial Review on Recent Hybrid SAR-ADC Architectures (invited paper)
T. Matsuura (Tokyo Univ. of Science, Japan)

Sensor/RF Digitization for IoT-Applications Using All-Digital-Very-Scalable-ADC TAD (invited paper)
T. Watanabe, H. Ishihara, T. Ito (DENSO CORPORATION, Japan)

10:55 Coffee Break
11:15 Special Session I (Part 4): New Trend of Analog Systems
Chairmen: Prof. Toshimasa Matsuoka and Prof. Hao San

Non-binary Cyclic and Binary SAR Hybrid ADC
K. Inoue, T. Matsuura, H. Akira (Tokyo Univ. of Science, Japan), H. San (Tokyo City Univ., Japan)

A 2nd-order ∆ΣAD Modulator Using Ring Amplifier and SAR Quantizer with Simplified Operation Mode
C. Pan, H. San, T. Shibata (TCU, Japan)

A Delta-Sigma DAC with Feedforward Jitter-Shaper Reducing Jitter Noise
S. Masuda, S. Saikatsu (Hosei Univ., Japan), M. Yoshino, A. Yasuda (Hosei Univ, Japan)

Comparator Design for Linearized Statistical Flash A-to-D Converter
T. Sugimoto, H. Tanimoto, S. Yoshizawa (Kitami Inst. of Techn., Japan)

13:00 Lunch
14:00 Tourist Activities

Day 3: June 24th, 2017 (Saturday)

TimeRoom A
08:30 Plenary Session III: General Invited Papers

The Future of CMOS: More Moore or The Next Big Thing?
W. Kuźmicz (Warsaw Univ. of Techn., Poland)

09:00 Vendor Session

Silicon Creations – Company Overview
P. Banachowicz (Silicon Creations, Poland)

09:35 Session 1 (Part 7): Design of Integrated Circuits and Microsystems

Multichannel Integrated Lock-in Amplifier for Low Noise Measurements
C. Kołaciński, D. Obrębski (Institute of Electron Techn., Poland)

Optimization of RF Low Noise Amplifier Design Using Analytical Model and Genetic Computation
A. Papadimitriou, M. Bucher (Tech. Univ. of Crete, Greece)

Single Active Parameter Tunable Simple Band-Pass Filter: Methods for Tunability Range Extension
R. Sotner, J. Petrzela, O. Domansky, L. Langhammer (Brno Univ. of Techn., Czech Republic), T. Dostal (College of Polytechnics Jihlava, Czech Republic)

Statistic Investigation and a Novel Design Technique for Improving the Accuracy of the Resistor Strings
A. Amini, M. Ghafourzadeh (Urumi graduate inst., Iran)

10:55 Coffee Break
11:15 Session 1 (Part 8) & 4

Temperature Calibration Technique Based on On-Chip Resistor
P. Narczyk, K. Siwiec, W. Pleskacz (Warsaw Univ. of Techn., Poland)

Three-Stage Nested-Miller Compensated Operational Amplifiers Design Based on Settling Time
H. Aminzadeh (Payame Noor Univ., Iran), M. Rajabzadeh (Quchan Univ. Adv. Tech., Iran)

Elements of Elastic Electronics Created on Textile Substrate
E. Korzeniewska, M. Walczak (Lodz Univ. of Techn., Poland)

13:00 Lunch
14:00 Introduction to Poster Session
Chairman: Prof.Wiesław Kuźmicz

A Comparative Study of Super-Regenerative Receivers for BAN Applications
S. Saleh, G. Hamdy, A. Zaki, H. Elsemary (Electronics Research Inst., Egypt)

A Highly Linear 4-bit DAC with 1GHz Sampling Rate Implemented in 28nm FD-SOI Process
Z. Jaworski (Warsaw Univ. of Techn., Poland)

A Low Energy Pulse Interval Modulation for Implantable Devices
D. Faria, R. Moreno, T. Pimenta (UNIFEI, Brazil)

Algorithms for Elimination of Charge Sharing Effects in Single Photon Counting Pixel Detectors
P. Otfinowski (AGH Univ. of Science and Techn., Poland)

Design of High-Performance PFD-CP for 403MHz CMOS Fractional-N Frequency Synthesizer
S. Saleh, G. Hamdy, H. Elsemary, A. Zaki (Electronics Research Inst., Egypt)

Design of Low Power Analog Front-End for 13.56MHz RFID Transponder
S. Saleh, M. Osman, A. Zaki, H. Elsemary (Electronics Research Inst., Egypt)

EIA/TIA-485 Transceiver in Standard 130 nm CMOS Technology
M. Wysocki, K. Siwiec, W. Pleskacz (Warsaw Univ. of Techn., Poland)

Hardware Implementation of 3D Pipelined Laplace Filter Based on Rotation Structures
P. Poczekajło, K. Wawryn (Koszalin Univ. of Techn., Poland)

On the Bandpass/Lowpass Microwave/RF Filter
M. Zaradny (Wrocław Univ. of Science and Techn., Poland)

Quick Method for Parameter Research of Higher Order Sigma-Delta Modulators Using Dynamically Reprogrammable FPAA
R. Suszyński (Koszalin Univ. of Techn., Poland)

Investigation of the Influence of Thermal Phenomena on Characteristics of IGBTs Contained in Power Modules
P. Górecki (Gdynia Maritime Univ., Poland)

Measurement of Microprocessor Throughput Increase with New Control System
P. Marzec, P. Fluder, A. Kos (AGH Univ. of Science and Techn., Poland)

Detection of THz Radiation by SOI Sensors
M. Zaborowski, D. Tomaszewski, J. Malesinska (Institute of Electron Techn., Poland), P. Zagrajek (Military Univ. of Techn., Poland)

Importance of On-Chip Inductor Modeling in Radio Frequency Integrated Circuits
D. Pietron, T. Borejko, K. Siwiec, W. Pleskacz (Warsaw Univ. of Techn., Poland)

Resistorless Universal Biquad Filter Based on Digitally Programmable Current Follower Transconductance Amplifier
A. Malcher (Silesian Univ. of Techn., Poland)

Analysis of Thermal and Electrical Properties of Heating Microsystems based on TCO Layers
M. Lebioda, M. Tomczyk (Lodz Univ. of Techn., Poland)

Durability and Reliability Enhancement of Selected Electronic Components Achieved by Laser Technologies
R. Pawlak, M. Tomczyk, M. Walczak (Lodz Univ. of Techn., Poland)

Prototyping of WTA ANNs Using FPAA Devices
K. Wawryn, R. Suszyński (Koszalin Univ. of Techn., Poland)

Shannon Information Entropy as Complexity Metric of Source Code
M. Cholewa (Univ. of Silesia, Poland)

Digital Control Buck Converter - Reducing the Impact of Load Change on the Output Voltage
J. Kaczmarek, R. Suszyński (Koszalin Univ. of Techn., Poland)

Undesirable Sub-harmonic Currents in the Coil of Buck Converter Prototype - Project Bumblebee
J. Kaczmarek, R. Suszyński (Koszalin Univ. of Techn., Poland)

A Serial Distance Calculation Circuit for the Application in Artificial Neural Networks and Pattern Recognition
M. Kolasa, T. Talaśka, R. Długosz (UTP Univ. of Science and Techn., Poland)

Camera Callibration and Object Size/Distance Calculation Application
J. Warczarek, P. Śniatała (Poznan Univ. of Techn., Poland)

Direct-Coupled-Resonators Bandpass Filters with Arbitral End-Coupled-Series-Immittances
M. Zaradny (Wrocław Univ. of Science and Techn., Poland)

Hardware Implementation of the Particle Swarm Optimization Algorithm
T. Talaśka, R. Długosz (Univ. Techn. & Life Sciences, Poland), W. Pedrycz (University of Alberta, Canada)

OWA Aggregation Operator in Robust Filtering
T. Pander (Silesian Univ. of Techn., Poland), J. Wróbel (ITAM Zabrze, Poland)

Semi-analytical Recursive Algorithms of Convolution Calculations for Digitally Controlled Buck Converter Design
J. Kaczmarek, R. Suszyński (Koszalin Univ. of Techn., Poland)

Dedicated AVR Bootloader for Performance Improvement of Prototyping Process
M. Lewandowski, T. Orczyk, P. Porwik (Univ. of Silesia, Poland)

Atrial Fibrillation Episodes Detection Based on Classification of Heart Rate Derived Features
N. Henzel, J. Wróbel, K. Horoba (ITAM Zabrze, Poland)

Bioimpedance Spectroscopy Monitoring-Designing Challenges and Description of the Acquired Results
B. Szuster, Z. Szczurek, D. Roj, A. Sobotnicki, P. Kowalski (ITAM Zabrze, Poland)

Control and Signal Processing Software Embedded in Smart Wristband Monitor of Silent Atrial Fibrillation
D. Roj, J. Wróbel, A. Matonia, K. Horoba, N. Henzel (ITAM Zabrze, Poland)

Hardware Design Issues and Functional Requirements for Smart Wristband Monitor of Silent Atrial Fibrillation
D. Roj, J. Wróbel, A. Matonia, E. Sobotnicka (ITAM Zabrze, Poland)

A High Precision Vernier Type Delta-Sigma Time to Digital Converter
K. Ando, T. Kato, S. Saikatsu, A. Yasuda (Hosei Univ, Japan)

An Application for Tree Structure NSDEM to a Directivity Speaker with Amplitude Controlling a Digitally Direct Driven Speaker
H. Akiyama, S. Yasutaka, A. Yasuda, S. Satoshi (Hosei Univ., Japan)

15:30 Coffee Break during the Poster Session
19:00 Closing Ceremony & Conference Banquet
TimeRoom B
09:35 Session 9: Medical Applications

Comparison of Algorithms for Detection and Real-Time Tracking of Living Microorganisms in Lab-on-a-Chip Devices
D. Lizanets, J.A. Dziuban, R. Walczak (Wrocław Univ. of Science and Techn., Poland)

Distributed-Arithmetic-Based DWT Processor for Neural Recording Systems
P. Turcza (AGH Univ. of Science and Techn., Poland)

Principal Component Analysis of Accelerations in Human Dynamic Movements: A Sample Set Length Effect Study
A. Łuczyk, K. Neneman, W. Pleskacz (Warsaw Univ. of Techn., Poland)

10:55 Coffee Break
11:15 Session 6: Power Electronics

Characteristics Improvement of 4H-SiC Using the CIBH Structure for 10KV BA-JTE Diode
Y. Jia, P. Li, D. Hu (BJUT, China), F. Yang, Y. Zha (Global Energy Interconnection Research Inst., China)

Diagrams for Energy Management in Renewable Energy Systems
W. Marańda (Lodz Univ. of Techn., Poland)

Review of Commercial SiC MOSFET Models: Topologies and Equations
A. Stefanskyi, Ł. Starzak, A. Napieralski (Lodz Univ. of Techn., Poland)

Review of Commercial SiC MOSFET Models: Validity and Accuracy
A. Stefanskyi, L. Starzak, A. Napieralski (Lodz Univ. of Techn., Poland)

13:00 Lunch
15:30 Coffee Break during the Poster Session
19:00 Closing Ceremony & Conference Banquet
TimeRoom C
09:35 Special Session I (Part 5): New Trend of Analog Systems
Chairman: Prof. Takeshi Shima

SI/PI/EMI Simulation Techniques and Application to Automotive Electronic Design Issues (invited paper)
H. Asai (Shizuoka Univ., Japan)

The Evolution of Analog and MEMs – New Market Trends and Challenges (invited paper)
S. Dalle Feste (STMicro, Italy)

10:55 Coffee Break
11:15 Special Session I (Part 6): New Trend of Analog Systems
Chairman: Prof. Hiroshi Tanimoto

Operational Amplifier Based LC Resonant Circuit for Adiabatic Logic
Y. Takahashi, T. Sekine, M. Han (Gifu Univ., Japan)

A Design Method of Low Frequency Universal Filter Employing MOCCIIs
F. Matsumoto, T. Ohbuchi, H. Nakamura, S. Matsuo (National Defense Academy, Japan)

Low-Distortion Low-Power MOSFET-C Filter Design Method
S. Takagi (Tokyo Tech., Japan), H. Sato (Tokyo Inst. of Techn., Japan)

13:00 Lunch
15:30 Coffee Break during the Poster Session
19:00 Closing Ceremony & Conference Banquet

Receipt of papers:

March 1st, 2017

Notification of acceptance:

April 30th, 2017

Registration opening:

May 15th, 2017

Final paper versions:

May 31th, 2017