Conference schedule



Day 1: June 27th, 2024 (Thursday)

TimeRoom A
08:15 Conference Openning
08:30 Plenary Session I

Advanced Technologies for Integrated Circuits – Challenges and Solutions
T. Brozek (PDF SOLUTIONS, Inc., USA)

Reflections on the First European Open Source PDK by IHP – Experiences After One Year and Future Activities
K. Herman (IHP, Germany)

On-chip Infrastructure for Mission-mode Monitoring of Aero-space Applications: Towards Silicon Lifecycle Management
F.L. Vargas (IHP – Leibniz Inst. for High Performance Microelectronics, Germany)

10:10 Session 1 (Part 1): Design of Integrated Circuits and Microsystems

10-bit ADC SAR with Passive Charge Redistribution in 40nm CMOS Technology
Ł. Orzeł, J. Świebocki, P. Otfinowski (AGH Univ. of Science and Techn., Poland)

A 0.006 mm² Low Input Capacitance Low Power Fully Differential Neural Amplifier
S. Sharma, . Shivdeep, N. Sharma, D.M. Das (Indian Inst. of Techn. Ropar, India)

A Low-Power Battery Charge and Discharge Protection Circuit for Bio-Implantable Sensors in 65nm CMOS
S.R. Qasemi, M. Rafati, A. Alvandpour (Linkoping Univ., Sweden)

11:10 Coffee Break
11:30 Session 1 (Part 2): Design of Integrated Circuits and Microsystems

A 66 μW Asynchronous Time-Domain Bulk-Tuned Offset Cancellation Circuit for High-Precision Dynamic Comparator
N. Sharma, S. Sharma, D.M. Das (Indian Instit. of Techn. Ropar, India)

A 66 dBΩ 5 GHz and 44.88 √Hz/(pA·pW) Inductorless TIA in 65 nm CMOS
A. Yaseen N J, . Shivdeep, S. Sharma (Indian Inst. of Techn. Ropar, India), H. Shrimali (Indian Inst. of Techn. Mandi, India), D.M. Das (Indian Inst. of Techn. Ropar, India)

A Method Supporting Hardware Implementation of Vector Quantization Module in HoG Algorithm
Z. Długosz, T. Talaśka (Bydgoszcz Univ. of Science and Techn., Poland), R. Długosz (Bydgoszcz Univ. of Science and Techn. and Aptiv Services, Poland)

Digital Fuzzy Logic Controller with Scalable Sequential Architecture
J. Waśkiewicz, A. Wielgus (Warsaw Univ. of Techn., Poland)

13:00 Lunch
14:00 Session 1 (Part 3): Design of Integrated Circuits and Microsystems

CMOS Computational Structures Using a Nonlinear Multifunctional Core
C.R. Popa (Univ. Politehnica of Bucharest, Romania)

Employing Parallelization Technique to Reduce Area and Power in a Booth Encoded Algorithm-Based Multiplier
K. Javanmardi (Roj Diyar, Iran), S. Sofimowloodi (Amirkabir Univ. of Techn., Iran), A. Attar (Roj Diyar, Iran), A. Amini (Univ. of Pavia, Italy)

FSMLock: Sequential Logic Locking through Encryption
M. Krebs, M. Łukowiak (Rochester Inst. of Techn., USA), S. Farris, M. Kurdziel (L3Harris Technologies, USA)

General-Purpose High Swing Digital-to-Analog Converter for Low Power Applications
V. Moland, C. Wulff (Norwegian Univ. of Science, Norway), D. Przyborowski (Nordic Semiconductor ASA, Norway)

15:20 Coffee Break
15:40 Session 1 (Part 4): Design of Integrated Circuits and Microsystems

Implementation of Hardware Trace Buffer Module for RISC-V Processor Core
B. Shveida (Warsaw Univ. of Techn., Poland), K. Marcinek (ChipCraft, Poland), W. Pleskacz (Warsaw Univ. of Techn., Poland)

Jitter Minimization of Phase-locked Loops for OFDM-Based Millimeter-Wave Communication Systems with Beam Steering
F. Herzel, C. Carta, G. Fischer (IHP – Leibniz-Institute for Innovative Microelectronics, Germany)

Leveraging Lookup Tables for Efficient LDO Design Exploration using Open-Source CAD Tools and IHP-Open130-G2 PDK
D. Arevalos, J. Marín (Univ. Tecnica Federico Santa Maria, Chile), K. Herman (IHP – Leibniz-Institute for Innovative Microelectronics, Germany), C. Rojas (Univ. Tecnica Federico Santa Maria, Chile)

Study of Storage Capacity of Charge Trap EAROM NAND Memory Designed for Integration with VeSTIC Technology
B. Dec, A. Pfitzner (Warsaw Univ. of Techn., Poland)

19:00 Welcome Party
TimeRoom B
10:10 Session 2 (Part 1): Analysis and Modelling of ICs and Microsystems

Application of Imagery Modeling and Deep Learning in Chip Thermal Analysis
Z. Shi, K. Liang, Z. Zeng, X. Shi (Shanghai Univ., China)

Limitations in the Transmission of High Power Rate Race Combiners Used in SSPA 450W CW Amplifiers in the C Band
A. Lewandowski (Zakład Doskonalenia Zawodowego, Poland)

Modeling and Comparing the Impact of Resistive and Capacitive Crossbar Associated Parasitics of Neuromorphic Circuits
S.A. Thomas, S. Kushwaha (Indian Inst. of Techn. Ropar, India), R. Sharma (Indian Inst. of Techn. Ropar, India and The Pennsylvania State Univ., USA), D.M. Das (Indian Inst. of Techn. Ropar, India)

11:10 Coffee Break
11:30 Session 2 (Part 2): Analysis and Modelling of ICs and Microsystems

Numerical Test for Stability Evaluation of Analog Circuits
T. Stefanski, P. Kowalczyk (Gdansk Univ. of Techn., Poland), J. Gulgowski (Univ. of Gdansk, Poland)

Parameter Extraction from SCLC Transport Mechanism in MIS RRAM Structures
M. Cheralathan, P. Wisniewski, R. B. Beck (CEZAMAT, Warsaw Univ. Tech., Poland)

Statistical Analysis of the Functioning of the Inertial Acceleration Sensor in a Variable Temperature Environment
J. Nazdrowicz, M. Jankowski (Lodz Univ. of Techn., Poland)

Truth Table Based Intelligent Computing
V. Hahanov, E. Litvinova (Kharkiv National Univ. of Radio Electronics, Ukraine), Z. Davitadze (Batumi Shota Rustaveli State University, Georgia), S. Chumachenko (Kharkiv National Univ. of Radio Electronics, Ukraine), D. Devadze (Batumi Shota Rustaveli State University, Georgia), V.H. Abdullayev (Azerbaijan State Oil and Industry University, Azerbaijan)

13:00 Lunch
14:00 Session 5 (Part 1): Embedded Systems

Bridge Circuit Converting Atomic Transactions between AMBA AXI4 and AMBA AXI5 Standards
J. Misztal (Warsaw Univ. of Techn. and Cadence Design Sytems Inc., Poland), M. Korona (Cadence Design Sytems Inc., Poland), W.A. Pleskacz (Warsaw Univ. of Techn., Poland)

Development of the Occupancy Detection System
M. Zbieć, D. Obrębski (Łukasiewicz - Inst. of Microelectronics and Photonics, Poland), D. Solnica (Lars Lighting Sp. z o.o., Poland)

Ethernet APL Survey and Application
A. Baratella Lugli, J.P.M. Paula Paiva, J.A. Pinto Azevedo, L. Silva Souza (Inst. Nacional de Telecomunicações - Inatel, Brazil), T. Pimenta (Univ. Federal de Itajuba, Brazil)

Hardware Acceleration Method Using RISC-V Core with No ISA Extensions
M. Wygrzywalski, P. Skrzypiec, R. Szczygieł (AGH Univ. of Science and Techn., Poland)

15:20 Coffee Break
15:40 Session 6 (Part 1): Medical Applications

Device for Simultaneous Recording of Lung Parameters and ECG as a Universal Tool for Comprehensive Physiological Monitoring - A Developmental Model
M. Czerw (Łukasiewicz – Krakow Inst. of Techn. and Silesian Univ. of Techn., Zabrze, Poland), I. Karpiel, K. Olesz, M. Mysiński (Łukasiewicz – Krakow Inst. of Techn., Poland), J. Mocha (Łukasiewicz – Krakow Inst. of Techn. and Silesian Univ. of Techn., Zabrze, Poland), A. Krawiecka, A. Sobotnicki (Łukasiewicz – Krakow Inst. of Techn., Poland)

Dry Electrodes for Capturing Brain Electrical Signals
L.G. Ferreira, T. Pimenta (Univ. Federal de Itajuba, Brazil)

Identification and Optimization of Landmarks on the Impedance Cardiography Signal ICG
I. Karpiel (Łukasiewicz – Krakow Inst. of Techn., Poland), M. Kluza (Łukasiewicz – Krakow Inst. of Techn. and Silesian Univ. of Techn., Zabrze, Poland), A. Sobotnicki (Łukasiewicz – Krakow Inst. of Techn., Poland)

Myasthenia Gravis Disease Diagnosis System
S. Baliński, P. Śniatała, J. Weissenberg, M. Fechner (Poznan Univ. of Techn., Poland), Ł. Rzepiński (Non-public Healthcare Facility ”SANITAS”, Poland), S. Michalak (Poznan Univ. of Medical Sciences, Poland)

19:00 Welcome Party
TimeRoom C
10:10 Tutorial: On-chip Infrastructure for Mission-mode Monitoring of Aero-space Applications: Towards Silicon Lifecycle Management
11:10 Coffee Break
11:30 Session 4: Power Electronics

A Low-Power Piezoelectric Energy Harvesting Circuit for Wearable Battery-free Power Supply
I. Pandiev (Tech. Univ. Sofia, Bulgaria), H. Antchev (Univ. of Chemical Techn. and Metallurgy, Bulgaria), M. Aleksandrova (Tech. Univ. Sofia, Bulgaria)

Design of a DC Nano-Grid Based on DBS and Smart Variable Load Control Approaches
K. Javanmardi (Roj Diyar, Iran), M. Moozarmi (Hamburg Univ. of Applied Science, Germany), A. Attar (Roj Diyar, Iran), A. Amini (Univ. of Pavia, Italy), S. Sofimowloodi (Amirkabir Univ. of Techn., Iran)

Management of Renewable Generation with Storage Energy Connect to the Grid
M. Santos Moreira (Inst. Nacional de Telecomunicações – Inatel, Brazil), R. Ribeiro (Univ. Federal de Itajuba, Brazil), M.R. Cruzline (Inst. Nacional de Telecomunicações – Inatel, Brazil), T. Pimenta (Univ. Federal de Itajuba, Brazil)

Utilizing Deep Learning Techniques to Eliminate the Current Sensor in a Boost Converter Used in a DC Nano-Grid
B. Azeri (Jade Univ. of Applied Sciences, Germany), K. Javanmardi (Roj Dyar, Iran), S. Sofimowloodi (Amirkabir Univ. of Techn., Iran), A. Attar (Roj Dyar, Iran), A. Amini (Univ. of Pavia, Italy)

13:00 Lunch
14:00 Special Session I: Simulation and Compact Modeling for Process, Device, Circuit, and Microsystem Design

Influence of Parasitic Capacitances and Inductances in a Power Electronic Converter on Junction Temperature of Power GaN HEMTs
P. Górecki, D. Ahmed (Gdynia Maritime Univ., Poland)

15:20 Coffee Break
15:40 Workshop: Joint IEEE EDS Workshop
19:00 Welcome Party

Day 2: June 28th, 2024 (Friday)

TimeRoom A
08:30 Plenary Session II

Single Dopant Lithography for the Fabrication of Atomic-scale Devices and Quantum Systems
I.W. Rangelow (Technische Univ. Ilmenau and nano analytik GmbH, Germany)

Exploring Photonic Integrated Circuits - Technologies, Applications and Challenges
R. Piramidowicz (Warsaw Univ. of Techn., Poland)

Energy-Efficient and High-Performance Data-Converters
J. Goes (Univ. NOVA de Lisboa, Portugal)

10:10 Session 1 (Part 5): Design of Integrated Circuits and Microsystems

Multifunctional Circuit with Applications in Analog Signal Processing
C.R. Popa (Univ. Politehnica of Bucharest, Romania)

Improving Accuracy of Current Mirrors for High Resolution Applications
E. Zehtabchi (Univ. of Pavia, Italy), H. Norouzi Kalehsar (Urmia Graduate Inst., Iran), A. Amini (Univ. of Pavia, Italy)

Practical Implementation of a Trapezoidal Waveform Generator in High Voltage SOI Technology
M. Jankowski (Lodz Univ. of Techn., Poland)

11:10 Coffee Break
11:30 Session 1 (Part 6): Design of Integrated Circuits and Microsystems

Simulation, Measurements and Analysis of the CMOS Temperature Sensor
M. Jankowski, M. Szermer (Lodz Univ. of Techn., Poland)

Sub-terahertz Near-field Dielectric Sensor in CMOS Technology
A. Chernyadiev, D. But, Y. Ivonyak, C. Kołaciński (CENTERA Labs, IHPP PAS, Poland), K. Ikamas, A. Lisauskas (Vilnius Univ., Lithuania)

Sub-terahertz Si CMOS Based Emitters and Detectors
D. But, C. Kołaciński, A. Chernyadiev (CENTERA Labs, IHPP PAS, Poland), K. Ikamas (Vilnius Univ., Lithuania), W. Knap (CENTERA Labs, IHPP PAS, Poland), A. Lisauskas (Vilnius Univ., Lithuania)

Using Cocotb Framework during Different Stages of IC Design
M. Ludwiniak, A. Łuczyk (Warsaw Univ. of Techn., Poland)

13:00 Lunch
14:00 Tourist Activities
19:00 Closing Ceremony
TimeRoom B
10:10 Session 3: Testing and Reliability

Analysis of an Influence of the Colour of the Emitted Light on Dynamic Properties of Power LEDs
K. Górecki, P. Ptak (Gdynia Maritime Univ., Poland)

Predicting the workload of the repair department in a company producing electronic modules
W. Kowalke, P. Krawczyk (Flex, Poland), K. Górecki (Gdynia Maritime Univ., Poland)

Utilizing a Variable Activation Threshold Approach to Calculate and Increase Probabilities of Anomaly Detection
K. Wawryn, P. Widulinski (Koszalin Univ. of Techn., Poland)

11:10 Coffee Break
11:30 Sessions 5 & 6 (Part 2): Embedded Systems & Medical Applications

LLVM Library for a Dedicated Processor Instruction Set - A Case Study
M. Zubert (Lodz Univ. of Techn., Poland), A. Łuczyk (Warsaw Univ. of Techn., Poland)

Memory Protection with Cached Authentication Trees
M. Łukowiak, A. Belle-Isle (Rochester Inst. of Techn., USA)

Real-time Detection of Pathogens in Hydroalcoholic Solutions during Hand Disinfection Process
P. Perronno (ICube Laboratory, France and Univ. of Freiburg, Germany), J. Claudinon (OPHARDT Hygiene AG, Switzerland), J. Perronno (Univ. of Freiburg, Germany), S. Disegna (ICube Laboratory, France and OPHARDT Hygiene AG, Switzerland), S. Disegna, C. Senin (Univ. of Freiburg, Germany), N. Dumas (ICube Laboratory, France), M. Bulst (Sciospec Scientific Instruments, Germany), S. Steltenkamp (OPHARDT Hygiene AG, Switzerland), W. Römer (Univ. of Freiburg, Germany), M. Madec (ICube Laboratory, France and Univ. of Freiburg, Germany)

A System for Measuring Physiological Parameters during Extreme Activities
E. Sobotnicka (Łukasiewicz – Krakow Inst. of Techn., Poland), J. Mocha (Łukasiewicz – Krakow Inst. of Techn. and Silesian Univ. of Techn., Gliwice, Poland), A. Sobotnicki (Łukasiewicz – Krakow Inst. of Techn., Poland), Ł. Dziuda (Military Inst. of Aviation Medicine, Poland)

13:00 Lunch
14:00 Tourist Activities
19:00 Closing Ceremony
TimeRoom C
10:10 Special Session II (Part 1): Instrumentation and Control for Thermonuclear Fusion
11:10 Coffee Break
11:30 Special Session II (Part 2): Instrumentation and Control for Thermonuclear Fusion
13:00 Lunch
14:00 Tourist Activities
19:00 Closing Ceremony

Receipt of papers:

March 15th, 2024

Notification of acceptance:

April 30th, 2024

Registration opening:

May 1st, 2024

Final paper versions:

May 15th, 2024