Day 1: June 25th, 2026 (Thursday)
| Time | Room A |
| 08:30 |
Conference Opening
Chairmen: Prof. Wojciech Tylman and Prof. Andrzej Pfitzner
|
| 08:40 |
Plenary Session I: General Invited Papers
Chairman: Prof. Wojciech Tylman
Digital Education in Engineering Practical Work TSRI Platform for Advanced Packaging and Silicon Photonics - Ecosystem for Industry–Academia–Research Collaboration |
| 09:40 |
Vendor Session I: Conference Partners' Presentations
Chairman: Prof. Wojciech Tylman
Challenges in HPC, AI for RISC-V Accelerator Chips AI-Driven On-Wafer Measurement: Integrated Probing Solutions from DC to 330 GHz, Silicon Photonics, 1/f and High-Power |
| 10:40 | Coffee Break |
| 11:00 |
Session 1 (Part 1): Design of Integrated Circuits and Microsystems
Chairman: Prof. Wojciech Tylman
An Asynchronous Circuit for Pattern Comparison Based on Programmable Gates and Asynchronous Incrementers and Decrementers A CMOS Double Balanced Mixer Using Current Bleeding and Negative Impedance Techniques A Multi-PLL Approach to Low-Spur, Low-Jitter Frequency Synthesis for Millimeter-Wave Bands An Integrated Phase Noise Generator for Sensitivity Measurements on Superconducting Qubits |
| 13:00 | Lunch |
| 14:00 |
Session 1 (Part 2): Design of Integrated Circuits and Microsystems
Chairman: Prof. Paweł Śniatała
A Sub-300-pW Voltage Reference with -227-dB PSR Using ΔVGS and Multi-Loop Regulation An Active-Passive 2nd-order CTΣΔM Using Single FIR Feedback for Battery Monitoring Digital Signal Tuning System for MEMS Excitation |
| 15:20 | Coffee Break |
| 15:40 |
Session 1 (Part 3): Design of Integrated Circuits and Microsystems
Chairman: Prof. Krzysztof Górecki
A 400 fs Resolution Vernier TDC with Adaptive Voltage Scaling A Design Strategy Based on gm/ID Method for Critically Damped Ring Amplifiers An LDO with 1 A at 1 Ω Load, 3.95 fs of FoM and 70 dB PSRR for TEC Controller Applications Design of a Soft-processor for Educational Purposes |
| 19:00 | Welcome Party |
| Time | Room B |
| 10:40 | Coffee Break |
| 11:00 |
Session 2: Analysis and Modelling of ICs and Microsystems
Chairman: Prof. Andrzej Pfitzner
An Overview of the Latest Quantum Technologies and Their Accessibility for Science Comparison of BJT and MOSFET Astable Multivibrators: A Theoretical and Simulation Study for Teaching Basic Electronics Comprehensive Harmonic-Domain Simulation of a Thermally-Driven MEMS Accelerometer with Full Noise Characterization Realisation of Simple Logic Circuits Using a Quantum Processing Unit - A Case Study Impact of Data Patterns and Interface Data Rates on DRAM Retention Reliability |
| 13:00 | Lunch |
| 14:00 |
Session 3: Power Electronics
Chairman: Prof. Alexander Kloes
Mapping of Temperature Dependent Heat Transfer Coefficient Values in Power Hybrid Electronic Circuits Cooled by Natural Convection Numerical Modeling-Enabled High-Temperature Characterization of Boron Doped Diamond Ohmic Contact and Material Resistivity Using a Simplified TLM Structure Reliability-Oriented TCAD Modelling of Low-Voltage Schottky p-GaN Gate Power HEMT Using CRSS(VDS) Curve as a Relevant Trapping Diagnosis Tools for Analyzing the Daily Performance of a Photovoltaic Installation Containing Bifacial Modules |
| 15:20 | Coffee Break |
| 15:40 |
Session 5: Embedded Systems
Chairman: Dr. Mike Schwarz
Evolution of Photonic Infrastructure in the IOWN Concept: Architecture, Experimental Results, and Real‑Time Applications PCB Modeled by a Lossy Three-Conductor Transmission Line Reliability Analysis of SAN Topologies under Variable Workloads Using Hybrid Simulation Techniques Study of the Ethernet-APL Communication Standard: A New Revolution for Industrial Automation |
| 19:00 | Welcome Party |
| Time | Room C |
| 10:40 | Coffee Break |
| 11:00 |
Special Session 3: Open-source Silicon Ecosystem
Chairman: Dr. Władysław Grabiński
OpenPDK as a Strategic FOSS IC Design Enabler Teaching Integrated Circuit Design with Open Source Electronic Design Automation Tools and Open Process Design Kits Architectural Evaluation of Iterative and Unrolled AES-128 in 45 nm Using an Open-Source Flow Broadening Participation in Open-Source Integrated Circuit Design and Fabrication Through IEEE Activities Analysis of the Behavior of a Memristive Device within a One-Transistor-One-Resistor Structure |
| 13:00 | Lunch |
| 14:00 |
Special Session 2: FAMES Pilot Line Highlights - Current Developments in FD SOI PDK and RRAM Applications
Chairman: Prof. Witold Pleskacz
A Pathfinding PDK Toward 10nm FD-SOI Technology RRAM Physical Unclonable Functions: Compact Modeling, Array Design, and Optimal Control Schemes for Security Applications A Low-area, Digitally Controlled Low Dropout Regulator with Calibration Logic Optimized for RRAM Control A Low Power, Low Area, Current Sampling Based Sense Amplifier Optimized for RRAM Readout Logic |
| 15:20 | Coffee Break |
| 15:40 |
Session 7: Medical Applications
Chairman: Prof. Marcin Janicki
A Low-Power Low-Offset DAC-Less LC-ADC for Biomedical Signal Acquisition A Low-Power Compact HV TX/RX Switch Composed of Three HV-MOS Transistors for Ultrasound Imaging Front-End ASICs Comparison of EWT and OVMD Techniques for Left and Right Hand Motor Imagery Classification in EEG Signals Design of a Neurorehabilitation System for Patients with Parkinson's Disease, with a Focus on Therapy outside the Clinical Setting Fast-Recovery Capacitive ECG Front-End Based on Reverse-Connected Zener Diodes |
| 19:00 | Welcome Party |
Day 2: June 26th, 2026 (Friday)
| Time | Room A |
| 08:30 |
Plenary Session II: General Invited Papers
Chairman: Prof. Andrzej Pfitzner
Photonic Integration for Optical Interconnect and Sensing Applications |
| 09:00 |
Vendor Session II: Conference Partners' Presentations
Chairman: Prof. Andrzej Pfitzner
From Cloud to Edge: The Rise of Intelligent, Distributed AI Systems |
| 09:20 |
Session 1 (Part 4): Design of Integrated Circuits and Microsystems
Chairman: Prof. Witold Pleskacz
Implementation of a Universal IP CORDIC Algorithm in Serial and Parallel Architectures IP Release and Cross-Foundry Design Migration for 3D-MRAM Technology Low-Voltage Low-Power Current-Mode Squaring and Multiplier/Divider Circuits Memory Cost Analysis for Sequential Logic Locking FSMLock |
| 10:40 | Coffee Break |
| 11:10 |
Session 1 (Part 5): Design of Integrated Circuits and Microsystems
Chairman: Prof. Krzysztof Górecki
Low Power Low Phase Noise Stacked Quadrature Ring Oscillator QoE-Aware Switch Architecture for MPEG-2 Transport Stream Digital TV Broadcast RC Time-Constant Calibration Scheme Using a DPLL Single-ended to Differential Mode Voltage-to-Current and Current-to-Voltage Converter in High Voltage SOI Technology |
| 13:00 | Lunch |
| 14:00 | Tourist Activities |
| 19:00 | Closing Ceremony & Conference Banquet |
| Time | Room B |
| 09:20 |
Session 4: Signal Processing
Chairman: Prof. Tomasz Talaśka
Analysis of Multivariate Industrial Process Data for Quality Pattern Detection in Masterbatch Coloring Envelope Identification Method for Guitar Amplifier Modelling with Wiener-Hammerstein Models One Crossbar, Two Functions: Analogue Image Obfuscation and Feature Extraction via Memristors Readout Board for the CBM Silicon Tracking System: Design Constraints, Powering Concept and Functional Validation |
| 10:40 | Coffee Break |
| 11:10 |
Session 7: Artificial Intelligence in Electronic Systems
Chairman: Prof. Tomasz Stefański
Application of Large-Scale Foundation Models and Multimodal Fusion for Stress Detection in Glider Pilots under Real-World Flight Conditions Design of a Gaussian Activation Function Generator for Neural Network Applications Hardware Implementation of a Bfloat16 Exponential Function for Softmax Computation ML-Based Error Mitigation Approach for Overcoming NISQ Hardware Constraints in Fermionic Nanoelectronic Simulations |
| 13:00 | Lunch |
| 14:00 | Tourist Activities |
| 19:00 | Closing Ceremony & Conference Banquet |
| Time | Room C |
| 09:20 |
Special Session 1 (Part 1): Advances in Smart Electronics for AI and Future Technologies
Chairman: Prof. Chih-Wen Lu
A 30 μW 2.4-GHz LNA with 5.6 dB NF Exploiting Trifilar Transformer Coupling for Smart AIoT Electronics A Nonlinear OTA Simulation Model for the Design of a Switched-Capacitor DSM Charge-Modulated Conductance and Synaptic Behavior in Access-Region WSe2/h-BN/Gr van der Waals Floating-Gate Transistors for Nonvolatile Memory Leveraging Semiconductor Eco-systems to MEMS |
| 10:40 | Coffee Break |
| 11:10 |
Special Session 1 (Part 2): Advances in Smart Electronics for AI and Future Technologies
Chairman: Prof. Chia-Yu Yao
MEMS-PMU Co-Simulation of an Electrostatic Energy Harvesting Interface for Battery-Free IoT Devices Review of High-PPI Micro-LED Display Drivers with Current-Mode PWM and Compact Pixel Circuits for Near-Eye Applications Secure IoT Platform with Advanced Key Generation and Robust Cybersecurity Simulation Analysis of a ±180° Phase Shifter Circuit Model |
| 13:00 | Lunch |
| 14:00 | Tourist Activities |
| 19:00 | Closing Ceremony & Conference Banquet |
| Time | Room D |
| 09:20 |
Tutorial (09:20) / EDS Meeting (~10:00)
Considerations on the Design of Resilient System-in-Package Based on Machine Learning and On-Chip Lifecycle Management IEEE EDS Poland Meeting |
| 10:40 | Coffee Break |
| 11:10 |
Special Session 4: UAV as a Platform for Various Applications
Chairman: Prof. Paweł Śniatała
Enhancing UAV Data Security Using Lightweight Cryptography Module P4-Programmable Raspberry Pi Nodes for Multi-Interface Edge Networking in Networked Airborne Computing Topology-Aware Offloading of DAG Tasks for Multi-UAV-Assisted Mobile Edge Computing Towards Autonomous Detection and Hot Patching of Binary Vulnerabilities in UAV Software |
| 13:00 | Lunch |
| 14:00 | Tourist Activities |
| 19:00 | Closing Ceremony & Conference Banquet |




