Optimum Design of a Mostly-Digital Fleischer-Laker Switched-Capacitor Bilinear Bandpass Filter in Standard CMOS Technology

H. Serra, J.P. Oliveira, J. Goes (UNINOVA-CTS and NOVA FCT, Portugal)

This paper presents a Fleischer-Laker switched-capacitor (SC) bilinear bandpass filter implemented using an inverter-based amplifier. Due to the generalized scaling used in advanced deep-submicron CMOS technology over the past decades, it is becoming increasingly more difficult to design high-gain high-bandwidth opamps, due to the reduction of the supply voltage and of the intrinsic gain of the transistors. Since the amplifier used is implemented using inverters, it can take advantage of the improved transistor performance in smaller nodes (chip area, transistor transit frequency, and power dissipation), which is mainly exploited by digital circuits. The filter circuit was designed in a 28-nm bulk-CMOS technology, using a supply voltage of 0.9 V and a clock frequency of 100 MHz. Simulation results show that the filter’s central frequency is approximately 10 MHz, with a gain of 0 dB, and a quality factor of 10/3. The amplifiers have a typical gain of 42.5 dB, the SC filter has a SNR of 54.4 dB, an IM3 of -63.6 dB, and the circuit’s total power dissipation is 2.5 mW.