Extraction of Open-Access-PDK Active Inductance Parameters with FOSS Tools

M. Brinson (London Metropolitan Univ., UK)

The choice of Verilog-A as an approved semiconductor device hardware description language for IC design has encouraged the interchange of standardized Verilog-A BJT, MOST and BiCMOS models across commercial and FOSS circuit simulators. Recent trends have seen the release of open-access IC production development kits for digital, analogue, RF and mixed analogue/digital design, completing the ”circuit concept to IC production” cycle with FOSS software tools. This paper is concerned with an extension of modelling, simulation and parameter extraction of analogue IC cells using Qucs-S/Ngspice and the IHP-G130G2 PDK. To illustrate these techniques an investigation of a C MOS analogue single ended active inductance cell is presented together with simulation output data and extracted model parameters for 130nm thin and thick oxide CMOS devices.