Readout Board for the CBM Silicon Tracking System: Design Constraints, Powering Concept and Functional Validation

P. Semeniuk (AGH University of Krakow, Poland), J. Lehnert, R. Kapell (GSI Helmholtzzentrum für Schwerionenforschung GmbH, Germany)

The CBM Silicon Tracking System (STS) is read out in a free-streaming, self-triggering architecture, where time stamped front-end data are continuously transported to the First Level Event Selector (FLES). The STS readout chain comprises detector front-end boards (FEBs), the Readout Board (ROB) layer, and a CRI-based (Common Readout Interface) back-end hosted in the FLES entry nodes. This paper presents the STS Readout Board (STS-ROB) developed for the CBM-STS detector and summarizes the design evolution, system constraints, and validation results that supported the production readiness of the board. The STS-ROB is the detector-form-factor successor of the earlier CROB (Common Readout Board) PCB, adapted to the final STS mechanical and system integration constraints. The STS-ROB aggregates and forwards front-end data towards the CRI-based back-end while distributing clock and control commands towards the detector electronics, and it provides the corresponding optical interface. In the system concept, the board is powered by an external Readout Powering Board (RPoB), which supplies the required low-voltage rails and enables a consistent powering scheme across the readout chain. We report a functional validation campaign demonstrating reliable operation of the STS-ROB in a representative laboratory setup and system level configurations, and outline key outcomes relevant for series production and commissioning.