An LDO with 1 A at 1 Ω Load, 3.95 fs of FoM and 70 dB PSRR for TEC Controller Applications

A. Kumar, H. Shrimali (Indian Inst. of Techn. Mandi, India)

A frequency compensation scheme for low-dropout regulators (LDOs) are presented to achieve stability in high loop gain architectures without altering the load capacitor when implemented in 65 nm CMOS technology.The technique improves the linearity of the LDO, allowing the regulator to be applied in thermoelectric cooler (TEC) controller systems. Crosscoupled current mirrors are used to increase transconductance, strengthen the negative feedback mechanism, improve transistor matching, and raise the output resistance. As a result, the design achieves higher gain, better linearity, and an improved figure of merit (FoM) compared with the conventional current mirror structures. Simulation results demonstrate the effectiveness of The proposed approach, showing a loop gain above 90 dB, a power supply rejection ratio (PSRR) of 70 dB at 1 MHz, and an FoM of 3.95 fs at a load current of 1 A.