Integrated CMOS ADC - Tutorial Review on Recent Hybrid SAR-ADC Architectures (invited paper)

T. Matsuura (Tokyo Univ. of Science, Japan)

There are many ADC architectures such as flash, pipeline, successive approximation or SAR, and oversampling or Delta-Sigma converters. According to the required specification, these architectures are properly used. Recently, SAR architecture is often used because of the non-necessity of high gain OP amps and therefore it is suitable to fine process. However, it is difficult to achieve high SNDR with simple SAR architecture. There are many proposals on hybrid architecture such as pipelined SAR-ADC, combination of SAR and oversample or noise-shaping approach. These improve achieved SNDR of ADCs. In this invited tutorial, recent progress on CMOS hybrid ADC architecture is reviewed.