Conference paper

A 4.5GHz, 64-bit Digital Comparator in 0.18µm CMOS Technology

M. Ghasemzadeh, K. Hadidi (Urmia Univ., Iran), F. Modarresi, M. Ghafourzadeh (Urmia Graduate Inst., Iran)

This paper is appropriated to a novel digital comparator with main targets of high-speed and minimum delay from the input to the output. The proposed 64-bit digital comparator have been applied in an ALU. Simulation results using HSPICE software with standard 0.18µm CMOS technology parameters, demonstrate 4.5GHz and 216ps delay with the power supply of 1.8volt and also Power-Delay Product (PDP) and Energy-Delay Product (EDP) are equal to 5.04pj and 1.05*103 pj*ps respectively.

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Receipt of papers:

March 15th, 2024

Notification of acceptance:

April 30th, 2024

Registration opening:

May 1st, 2024

Final paper versions:

May 15th, 2024