Conference paper

DC/DC Buck Converter with Build-in Tuned Sawtooth Wave Generator Using CMOS Technology

A. Borkowski (Warsaw Univ. of Techn., Poland), T. Borejko (Warsaw Univ. of Techn., ChipCraft Sp. z o.o., Poland), W. Pleskacz (Warsaw Univ. of Techn., Poland)

In this paper low power DC/DC buck converter based on 110 nm standard CMOS process is described. It has been optimized for high power efficiency, stable 1.5 V output voltage with low ripple level and good stability. Implemented system has a maximum 150 mA load current driving capability in the input voltage range 2.5 - 3.7 V which is supplying battery voltage used in chip. At least 82% energy efficiency is achieved (in worst process corner) up to 95% at best conditions. Output voltage ripple is below 10 mVpp. loop.

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Receipt of papers:

March 15th, 2024

Notification of acceptance:

April 30th, 2024

Registration opening:

May 1st, 2024

Final paper versions:

May 15th, 2024