Conference paper

Improving Dual-Slope A/D Converter with Noise-Shaping and Digital Filtering Techniques

P. Śniatała, D. Makowski (Poznan Univ. of Techn., Poland), J. Goes (Univ. Nova de Lisboa, Portugal), W. Machowski (AGH Univ. of Science and Techn., Poland), S. Salas Arriarán (Univ. Peruana de Ciencias Aplicadas, Peru)

The paper describes a modification of a dual-slope ADC (Analog to Digital Converter) by using oversampling, noise-shaping and digital filtering techniques. Elaborated MATLAB/SIMULINK models were used to verify the proposed solution. The simulation results show the improvement such as 4-bit dual-slope ADC can be used to reach an effective resolution compatible with 10 bits. The physical implementation of the proposed CIC filter was synthesized into FPGA Artix-7 platform.

Download one page abstract

Receipt of papers:

February 29th, 2020

Notification of acceptance:

April 25th, 2020

Registration opening:

April 30th, 2020

Final paper versions:

May 15th, 2020