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Conference paper

QoE-Aware Switch Architecture for MPEG-2 Transport Stream Digital TV Broadcast

M. Albuquerque, M. Santos, E. Lima (Inatel, Brazil), J. Oliveira Filho (Cadence, Brazil), E. Pereira, L. Souza, F. Rocha, F. Portelinha Junior (Inatel, Brazil), T. Pimenta (UNIFEI, Brazil)

This paper presents a digital architecture for a Quality of Experience (QoE)-aware switch targeting Digital Television (DTV) broadcast applications based on MPEG-2 Transport Streams (TS). The proposed system exploits redundancy among multiple transport stream sources by continuously monitoring packet continuity through analysis of the Continuity Counter (CC) field defined in the ISO/IEC 13818-1 standard. The architecture comprises asynchronous dual-clock FIFOs for clock domain crossing (CDC), a Sync Recovery Unit (SRU) for packet boundary alignment, a Packet Processing Unit (PPU) for real-time discontinuity detection, and a Main Control (MC) module responsible for intelligent source selection. A memory-mapped interface enables configuration of operating modes, priority policies, and monitoring of packet loss metrics. The system supports both automatic and manual selection modes and implements a fallback mechanism to prioritize higher-ranked sources when quality conditions are restored. Designed for hardware efficiency, the architecture operates with independent clock domains at 27~MHz and 108~MHz while maintaining low resource utilization. The proposed solution enhances QoE in redundant DTV transmission systems by automatically selecting the stream exhibiting the lowest packet loss.

Receipt of papers:

March 15th, 2026

Notification of acceptance:

April 30th, 2026

Registration opening:

May 2nd, 2026

Final paper versions:

May 15th, 2026