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MIXDES - The MIXDES 1999 information

6th International Conference
Mixed Design of Integrated Circuits and Systems
Kraków, 17-19 June 1999

The MIXDES'99 Conference took place in Kraków, Poland. The topics of the MIXDES Conference included:

  1. Design Problems
  2. Analysis and Modelling of Integrated Circuits and Microsystems
  3. Microelectronics Technology, Microsystems and Micromachines
  4. Power Devices and Integrated Circuits
  5. Thermal Problems in Microelectronics
  6. Digital and Analog Filters, Signal Processing and Telecommunication Circuits
  7. Testing and Reliability Problems
  8. Practical Realzations and Industrial Applications
  9. Education of Microelectronics and Power Electronics

The total number of 99 papers from 21 countries were accepted for publication including 9 invited papers.

The following invited papers were presented during the conference:

  1. Addressing of Liquid Crystal Displays, H. Pauwels, H. De Smet (Univ. Gent, BELGIUM)
  2. Electrothermal Transport Properties of SiC Power Devices: Demands, Potentials, and Challenges, G. Wachutka (Munich Univ. of Techn., GERMANY)
  3. Focus on the Design of Measuring Microsystems, A. Barwicz (Univ. Quebec and Measuring Microsystems A-Z Inc., CANADA)
  4. Fundamental Limits of Power Dissipation in Digital Electronics, A. De Vos (Univ. Gent, BELGIUM)
  5. Hierarchical Design of Microelectromechanical Systems, G.K. Fedder (Carnegie Mellon Univ., USA)
  6. Mechanisms of Radiation - Induced Failures in Power MOSFETs, P. Habas (PHILIPS Semicond., THE NETHERLANDS), N. Stojadinovic (Univ. Nis, )
  7. New Power Integrated Devices Based on Functional Integration, J.-L. Sanchez, P. Austin, J. Jalade, J.-P. Laur, M. Breil (LAAS-CNRS, FRANCE)
  8. Recent Progress of Static Induction Transistors, J.-I. Nishizawa, P. Plotka (Semiconductor Research Inst., JAPAN)
  9. VHDL-AMS Language: A Standard Platform for Digital/Analog Modeling, P. Bakowski (Univ. Nantes, FRANCE)

The following papers has been awarded:

  • Outstanding Paper Award was presented to:
    • CAD Utilities for MEMS Design, W. Wojciak (Tech. Univ. Lodz, POLAND), M. Turowski (CFDRC, USA)
    • CAIRO: A Hierarchical Layout Language for Analog Circuits, M. Dessouky, A. Greiner, M.-M. Louerat (Univ. Pierre et Marie Curie, FRANCE)
    • Comparison of the Thermal Simulation Results for the Hybrid Circuit Test Structure, M. Janicki, A. Napieralski (Tech. Univ. Lodz, POLAND), D. Fedasyuk, D. Petrov (State Univ. "Lvivska Politechnika", UKRAINE)
    • Conception of Improving Precision of Low-voltage CMOS Sample and Hold Circuit, R. Wojtyna, P. Grad, M. Kalista (Univ. of Techn. & Agricult., POLAND)
    • Digital-Analogue ASIC for Intercommunicating Systems, E. Kurjata-Pfitzner, I. Janiszewski, D. Ladziak, W. Podmiotko, A. Szymanski, R. Baraniecki, E. Kalinski, K. Siekierska (Inst. of Electron Techn., POLAND)
    • Dynamically Reconfigurable Strategies for Implementing Artificial Neural Networks Models in Programmable Hardware, J.M. Moreno, J. Cabestany, E. Canto (Tech. Univ. Catalunya, SPAIN), J. Faura, J.M. Insenser (SIDSA, SPAIN)
    • Integration of Porous Silicon Light Emitting Diode and Photodetector with Waveguide Based on Multilayer Alumina Structure, S.K. Lazarouk, P.V. Jaguiro, A.A. Leshok, V.E. Borisenko (Belarusian State Univ. of Inf. and Radioel., BELARUS)
    • Noise Performance of Current-feedback Operational Amplifiers, G. Palumbo, S. Pennisi (Univ. Catania, ITALY)
    • Oscillator Synchronisation Problem in a BiCMOS Analog-Digital Integrated Circuit Dedicated to a Capacitive Pressure Sensor, P. Menini, P. Pons, C. Douziech, P. Favaro, G. Blasquez (LAAS-CNRS, FRANCE), P. Dondon (IXL Bordeaux, FRANCE)
    • Physical and Behavioral Simulations of Squeeze Film Damping in MEMS, M. Turowski, A. Przekwas (CFDRC, USA), S. Vemuri, G.K. Fedder (Carnegie Mellon Univ., USA)
    • VHDL Models of Digital Combinatorial Circuits on the Current-mode Gates, D. Gretkowski, A. Guzinski, J. Kaniewski, O. Maslennikow (Tech. Univ. Koszalin, POLAND)
    • VLSI Design of a Flexible-structure Sequential Mixed-signal Neural Processor, J. Madrenas, E. Alarcon, J. Cosp, J.M. Moreno (Tech. Univ. Catalunya, SPAIN)


Receipt of papers:

March 15th, 2025

Notification of acceptance:

April 30th, 2025

Registration opening:

May 2nd, 2025

Final paper versions:

May 15th, 2025