Conference paper

Current vs Substrate Bias Characteristics of MOSFETs as a Tool for Parameter Extraction

D. Tomaszewski, J. Malesińska, G. Głuszko, K. Kucharski (Łukasiewicz Research Network - ITE, Poland)

An application of the drain current vs substrate bias characteristics of MOSFETs for the device parameter extraction is presented. Modeling of the substrate bias effect on the MOSFET drain current is briefly discussed. A method of the MOSFET characterization is formulated. It requires a measurement of two I(V) characteristics, including the ID(VBS) smooth curve measured in a "sweep" mode. The metod allows for extraction of the threshold voltage parameters and of the in-depth doping profile in the substrate. The proposed approach is demonstrated using I(V) data of the MOSFETs manufactured in ITE in a bulk CMOS process.

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Receipt of papers:

March 1st, 2021

Notification of acceptance:

April 26th, 2021

Registration opening:

May 17th, 2021

Final paper versions:

May 17th, 2021