Conference paper

Exploiting Design Modularity and Relocation to Increase Productivity in FPGA-based Computing Systems

Z. Mudza (Lodz Univ. of Techn., Poland)

Long development cycles are a crucial disadvantage of FPGA-based systems. Reusing implementation results of a module for multiple instances and across different designs can mitigate this issue. Identical relative placement and routing for multiple instances of a module can be forced in Xilinx 7 Series devices with strict design constraining. A reference instance of a module can be implemented in a certain section of FPGA fabric. Fixed placement and routing constraints can be extracted from the obtained results and relocated to any identical section of FPGA fabric. The approach is especially useful when applied to reconfigurable partitions – it supports independent development and implementation of reconfigurable modules and static design. Also, in some cases it can be extended to relocating entire partial bitstreams.

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Receipt of papers:

March 15th, 2021

Notification of acceptance:

May 11th, 2021

Registration opening:

May 17th, 2021

Final paper versions:

May 31th, 2021