Implementation of a Modified High-Voltage Unity-Gain Voltage Buffer

M. Jankowski (Lodz Univ. of Techn., Poland)

Abstract—This paper presents modification of a specialized high-voltage unity-gain buffer related to its physical implementation in a selected high-voltage SOI technology process. Several additional safety devices are required for non-destructive power-up, normal operation and power-down phases of this buffer function cycle. The modifications are largely related to intricacies of the buffer topology, as low- and high-voltage MOS devices are used there in close cooperation. Impact of the implementation-related changes on the buffer operation capabilities is presented and discussed.