Conference paper

Design of 1.55 NEF, 2μA, Chopper Based Amplifier in 40nm CMOS for Biomedical Multichannel Integrated System

P. Wargacki, P. Kmon (AGH Univ. of Science and Techn., Poland)

Below paper presents a design of a low-noise chop- per based amplifier for biomedical recordings. It is a part of a multi-channel integrated system fabricated in 40nm CMOS technology. It features a DC stabilizing loop for compensating electrode offset and positive feedback for input impedance boost- ing. The first stage uses double current reuse. Design consumes 2μA per channel under 1V supply voltage and occupies only 0.044mm2of silicon area. A novel input stage presented in this work combines a low noise performance of a stacked input pair with the high DC gain of the folded cascode amplifier. The simulated input-referred noise is 0.96μV rms in the 0.5–100Hz frequency band and 2.8μV rms in the 100Hz–10kHz frequency band, respectively, leading to a noise-efficiency factor of 5.29 (0.5–100Hz) and 1.55 (0.1–10kHz).

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Receipt of papers:

March 15th, 2022

Notification of acceptance:

April 30th, 2022

Registration opening:

May 12th, 2022

Final paper versions:

May 20th, 2022