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Conference paper

Design of the Slope Detection Circuit for On-Chip Current Sensing

R. Ravasz, D. Maljar, D. Arbet, V. Stopjakova, P. Kubinec (Slovak Univ. of Techn., Slovakia)

This paper presents a design and analysis of the slope detection circuit for on-chip sensing of load current in DC-DC converters. The proposed indirect sensing approach is based on measurement of the output voltage slope across the filtering capacitor during the discharging phase. Thus, information about the slope of output voltage can be further used for rather effective control of switches in the converter. The slope detector circuit was designed in standard 65 nm CMOS technology using the nominal supply voltage of 1.2 V and can be used for current sensing within the range from one to hundreds of mA. Since the proposed circuit has mainly digital character, the robustness to process, temperature and supply voltage variations can be ensured rather conveniently.

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Receipt of papers:

March 1st, 2025

Notification of acceptance:

April 30th, 2025

Registration opening:

May 15th, 2025

Final paper versions:

May 15th, 2025