MIXDES - The MIXDES 2006 information

International Conference
Mixed Design of Integrated Circuits and Systems
Gdynia, 22-26 June 2006

The MIXDES 2006 Conference took place in Gdynia, Poland. The topics of the MIXDES Conference included:

  1. Design of Integrated Circuits and Microsystems
  2. Thermal Issues in Microelectronics
  3. Analysis and Modelling of ICs and Microsystems
  4. Microelectronics Technology and Packaging
  5. Testing and Reliability
  6. Power Electronics
  7. Signal Processing
  8. Embedded Systems
  9. Medical Applications
  10. Information Technology
  11. Education

The total number of 154 papers from 37 countries were accepted for publication including 6 invited papers.

The following invited papers were presented during the conference:

  1. New Directions in Technology for High-Speed Wireless Data Communications, D. Foty (Sarissa Radio, Inc., USA)
  2. Physical Models for Smart-Power Devices, M. Rudan, S. Reggiani, E. Gnani, G. Baccarani (Univ. Bologna, ITALY), C. Corvasce, M. Ciappa (ETH Zentrum, SWITZERLAND), M. Stecher (Infineon Technologies AG, GERMANY), D. Pogany, E. Gornik (Vienna Univ. of Techn., AUSTRIA)
  3. Silicon Carbide Devices and Processes - Present Status and Future Perspective, M. Ostling, H.-S. Lee, M. Domeij, C.-M. Zetterling (Royal Inst. of Techn., SWEDEN)
  4. The New Generation of the Photoelectric Measurement Methods of MOS Structure Parameters, H.M. Przewlocki (Inst. of Electron Techn., POLAND)
  5. Thermoelectric and Thermionic Microgenerators: Chances, Challenges and Limitations, G. Wachutka (Munich Univ. of Techn., GERMANY), Y.C. Gerstenmaier (Siemens AG, GERMANY)
  6. TUNNETT Diode Oscillators for mm-Wave Wideband Communication and for Terahertz Electronics, P. Plotka (Semiconductor Research Inst., JAPAN)

The following special sessions were organised during the conference:

  1. Compact Models - The Heart of Mixed-Signal Design Flow
    • 1/f Noise Corner Modeling, W.C. Pflanzl, E. Seebacher, Z. Huszka (austriamicrosystems, AUSTRIA)
    • Advanced Device Modeling Using Automatic Differentiation in a Mixed Domain Circuit Simulator, M.B. Steer, N.M. Kriplani, W. Jang (North Carolina State Univ., USA), A. Mantooth (Univ. Arkansas, USA)
    • A Sigma-Delta ADC Design Automation Tool with Embedded Performance Estimator, S. Talay, E. Deniz, G. Dundar (Bogazici Univ., TURKEY)
    • A User-friendly Benchmark Tool for MOS Models, Y. Papananos, A. Vasilopoulos, A. Bazigos, N. Nastos (National Tech. Univ. Athens, GREECE)
    • Design Methodology Based on the Analog Blocks Retargeting from Bulk to FD SOI Using EKV Model, M. Kayal, M. Blagojevic (Swiss Federal Inst. of Techn. Lausanne, SWITZERLAND)
    • Fuzzy Logic Parameter Extraction for a Compact Organic TFT Model, R. Picos (Univ. Balearic Islands, SPAIN), B. Iniguez (Univ. Rovira i Virgili, SPAIN), E. Garcia-Moreno (Univ. Balearic Islands, SPAIN), R. Garcia (Univ. Rovira i Virgili, SPAIN), M. Estrada (CINVESTAV, MEXICO)
    • Impact of Intrinsic Parameter Fluctuations on Deca-nanometer Circuits, and Circuit Modelling Techniques, B. Cheng, S. Roy, A. Asenov (Univ. Glasgow, UK)
    • Modification of Compact Bipolar Transistor Model for DFM (Design For Manufacturing) Applications, S. Yoshitomi, K. Kawakyu, T. Teraguchi, H. Kimijima, K. Yonemura (TOSHIBA Corp., JAPAN)
    • PUNSIM: An Advanced Surface Potential Based MOSFET Model, J. He, Y. Song, X. Niu, B. Li, X. Zhang, R. Huang (Peking Univ., CHINA), M. Chan (Hong Kong Univ. of Science & Techn., HONG KONG), Y. Wang (Peking Univ., CHINA)
    • Scaling Issues in an 0.15µm CMOS Technology with EKV3.0, E.-S. Kitonaki, A. Bazigos (National Tech. Univ. Athens, GREECE), M. Bucher (Tech. Univ. Crete, GREECE), H. Puchner, S. Bhardwaj (Cypress Semiconductor, USA), Y. Papananos (National Tech. Univ. Athens, GREECE)
    • Temperature Effect on the Buried Double Junction Color Detector Behavior, F. Haned, M. Ben Chouikha, G. Alquie (Pierre & Marie Curie Univ., FRANCE)
  2. CARE Project Special Session
    • A Novel Approach for Operating Systems Protection Against Single Event Upset, B. Swiercz, D. Makowski, A. Napieralski (Tech. Univ. Lodz, POLAND)
    • External Radiation Shielding for the Protection of Electronic Devices Operating in the FLASH Facility Tunnel at DESY, B. Mukherjee (Deutsches Elektronen-Synchrotron DESY, GERMANY), D. Makowski (Tech. Univ. Lodz, POLAND), D. Rybka (Warsaw Univ. of Techn., POLAND), O. Kroeplin, S. Simrock, H.J. Eckoldt (Deutsches Elektronen-Synchrotron DESY, GERMANY)
    • High Speed Synchronization Module Implemented in ALTERA Stratix II FPGA, K. Przygoda, M. Grecki (Tech. Univ. Lodz, POLAND)
    • Improvements of Expert System for RF-power Stations, B. Koseda, W. Cichalewski (Tech. Univ. Lodz, POLAND)
    • Low Level Radio Frequency Control System for the European XFEL, S. Simrock (Deutsches Elektronen-Synchrotron DESY, GERMANY)
    • New Method for RF Field Amplitude and Phase Calibration in FLASH Accelerator, P. Pawlik, M. Grecki (Tech. Univ. Lodz, POLAND), S. Simrock (Deutsches Elektronen-Synchrotron DESY, GERMANY)
    • The Low Level Radio Frequency System Architecture for the European X-FEL, T. Jezynski (Tech. Univ. Lodz, POLAND), S. Simrock (Deutsches Elektronen-Synchrotron DESY, GERMANY)
    • The Radiation Tolerant Readout System for SRAM-based Neutron Detector, D. Makowski, M. Grecki (Tech. Univ. Lodz, POLAND), B. Mukherjee (Deutsches Elektronen-Synchrotron DESY, GERMANY), B. Swiercz (Tech. Univ. Lodz, POLAND), S. Simrock (Deutsches Elektronen-Synchrotron DESY, GERMANY), A. Napieralski (Tech. Univ. Lodz, POLAND)
    • Timing Based Process Execution in Linux Environment, M. Borzecki, B. Swiercz, A. Napieralski (Tech. Univ. Lodz, POLAND)

The following papers has been awarded:

  • Outstanding Paper Award was presented to:
    • A Digitally Controlled On-chip Monotonic Reference Current Generator with Low LSB Current for Fast and Accurate Optical Level Monitoring, W. Chen, J. Bauwelinck, P. Ossieur, X.Z. Qiu, J. Vandewege (Ghent Univ., BELGIUM)
    • A Measurement Technique to Obtain the Delay Time of a Comparator in 120nm CMOS, B. Goll, M. Spinola Durante, H. Zimmermann (Vienna Univ. of Techn., AUSTRIA)
    • A New IGBT Model Based on Distributed PIN Model for SPICE, L. Starzak, A. Napieralski (Tech. Univ. Lodz, POLAND)
    • A Novel Approach for Operating Systems Protection Against Single Event Upset, B. Swiercz, D. Makowski, A. Napieralski (Tech. Univ. Lodz, POLAND)
    • Asynchronous Sigma-Delta Modulator Based on the Charge Pump Integrator, D. Koscielnik, M. Miskowicz (AGH Univ. of Science and Techn., POLAND)
    • Calculations of Nonisothermal Characteristics of DC-DC Converters with the Average Models Taken into Account, K. Gorecki, J. Zarebski (Gdynia Maritime Univ., POLAND)
    • Design of a Multichannel ASIC for Large Scale Spatio-Temporal Distributed Stimulation of Neural Tissue, P. Hottowy, W. Dabrowski, A. Skoczen, P. Wiacek (AGH Univ. of Science and Techn., POLAND)
    • Die Attach Thermal Monitoring of IGBT Devices, F.N. Masana (Tech. Univ. Catalunya, SPAIN)
    • Experiments Around SPARC LEON-2 for MPEG Encoding, P.G. de Massas, P. Amblard (Lab TIMA, FRANCE)
    • Low Power Discriminators with Input Offsets Correction for Fast Multichannel Recording ASIC, P. Grybos, M. Idzik, P. Maj, K. Swientek (AGH Univ. of Science and Techn., POLAND)
    • Non-fourier Thermal Conduction in Nano-scaled Electronic Structures, B. Vermeersch, G. De Mey (Ghent Univ., BELGIUM)
    • Otolith Database Analysis for Fish Age Estimation Using Neural Networks Methods, S. Bermejo, J. Cabestany (Tech. Univ. Catalunya, SPAIN)
    • POEtic: A Hardware Prototyping Platform with Bio-inspired Capabilities, J.M. Moreno (Tech. Univ. Catalunya, SPAIN), Y. Thoma, E. Sanchez (Swiss Federal Inst. of Techn. Lausanne, SWITZERLAND)
    • Reliable Iris Localization Method with Application to Iris Recognition in Near Infrared Light, K. Grabowski, W. Sankowski, M. Zubert, M. Napieralska (Tech. Univ. Lodz, POLAND)
    • Robustness of Transmultiplexed Images, P. Sypka, M. Ziolko, B. Ziolko (AGH Univ. of Science and Techn., POLAND)
    • The Linux as the Operating System for Computational Node of Custom Computing Machine Class System, M. Szulc, J. Pierzchlewski, A. Rybarczyk (Poznan Univ. of Techn., POLAND)
    • VHDL-AMS Model Creation, D. Guihal, L. Andrieux, D. Esteve, A. Cazarre (LAAS - CNRS, FRANCE)
  • Poland Section IEEE ED Chapter Special Award was presented to:
    • MOS Translinear Principle Based Analogue Multiplier Divider, R. Garg, J. Govil, P. Goel (Univ. Delhi, INDIA)


Receipt of papers:

March 15th, 2024

Notification of acceptance:

April 30th, 2024

Registration opening:

May 1st, 2024

Final paper versions:

May 15th, 2024