MIXDES - The MIXDES 2010 information

17th International Conference
Mixed Design of Integrated Circuits and Systems
Wrocław, 24-26 June 2010

The MIXDES 2010 Conference took place in Wrocław, Poland. The topics of the MIXDES Conference included:

  1. Design of Integrated Circuits and Microsystems
  2. Thermal Issues in Microelectronics
  3. Analysis and Modelling of ICs and Microsystems
  4. Microelectronics Technology and Packaging
  5. Testing and Reliability
  6. Power Electronics
  7. Signal Processing
  8. Embedded Systems
  9. Medical Applications

The total number of 124 papers from 25 countries were accepted for publication including 4 invited papers.

The following invited papers were presented during the conference:

  1. CMOS Sensor Arrays for Bio Molecule Diagnostics, R. Thewes (Tech. Univ. Berlin, GERMANY)
  2. Device-Conscious Circuit Designs for Low-Voltage Nanoscale CMOS LSIs, K. Itoh (Hitachi, Ltd., JAPAN)
  3. Energy Saving by Power Electronics in Household and Car Applications, W. Weber, G. Deboy, W. Frank, O. Hellmund, A. Iberl, P. Leteinturier (Infineon Technologies, GERMANY)
  4. Ultra-thin Body SOI and Nanowire Transistors for 22nm Technology Node and Below, T. Poiroux, F. Andrieu, O. Weber, C. Dupré, T. Ernst, C. Fenouillet-Beranger, P. Perreau, C. Buj-Dufournet, L. Tosti, L. Brevard, S. Barraud, O. Faynot (Commissariat à l'Énergie Atomique, FRANCE)

The following special sessions were organised during the conference:

  1. Compact Modeling for Advanced Analog/RF IC Applications
    • 3D Simulations of Si-Detectors for High Energy Physics and Astronomy, K. Gärtner (WIAS, GERMANY)
    • A Hybrid Verilog-A and Equation-defined Subcircuit Approach to MOS Switched Current Analog Cell Modeling and Simulation in the Transient and Large Signal AC Domains, M. Brinson (London Metropolitan Univ., UK), S. Jahn (Qucs Project Manager, GERMANY), H. Nabijou (London Metropolitan Univ., UK)
    • Analog Performance of Advanced CMOS in Weak, Moderate, and Strong Inversion, M. Bucher, G. Diles, N. Makris (Tech. Univ. Crete, GREECE)
    • Analytical 2D Model for the Channel Electric Field in Undoped Schottky Barrier Double-Gate MOSFET, M. Schwarz, A. Kloes (Univ. of Appl. Scien. Giessen, GERMANY), B. Iñíguez (Univ. Rovira i Virgili, SPAIN)
    • Analytical Inversion-mode Varactor Modeling Based on the EKV Model and its Application to RF VCO Design, J.-K. Bremer, T. Peikert, W. Mathis (Leibniz Univ. Hannover, GERMANY)
    • A Universal Model for Calculating Capacitive and Resistive Coupling on Lightly and Heavily Doped CMOS Processes, Y. Bontzios, A. Hatzopoulos (Aristotle Univ. Thessaloniki, GREECE)
    • Capabilities and Limitations of Equivalent Circuit Models for Modeling Advanced Si FET Devices, D. Schreurs, M. Homayouni, G. Avolio (Katholieke Univ. Leuven, BELGIUM), G. Crupi, A. Caddemi (Univ. Messina, ITALY)
    • Compact Physics-based Model for Ultrashort FinFETs, A. Yesayan, N. Chevillon, F. Prégaldiny, C. Lallement (InESS/UdS, FRANCE)
    • Customer-Oriented Product Engineering of Micro and Nano Devices, T. Bieniek, G. Janczyk, P. Grabiec, J. Szynka, S. Kaliciński, P. Janus, K. Domański, A. Sierakowski, M. Ekwińska, D. Szmigiel, D. Tomaszewski (Institute of Electron Techn., POLAND), G. Hölzer (X-FAB Semiconductor Foundries AG, GERMANY), G. Schröpfer (Coventor Sarl, FRANCE)
    • Process Control Monitor Based Extraction Procedure for Statistical Compact MOSFET Modeling, M. Yakupov, D. Tomaszewski (Institute of Electron Techn., POLAND), W. Grabiński (GMC, SWITZERLAND)
    • State-of-the-art Microwave Device Characterization Using Large-Signal Network Analyzers, M. Myslinski (Katholieke Univ. Leuven and NMDG N.V., BELGIUM), G. Pailloncy (NMDG N.V., BELGIUM), G. Avolio (Katholieke Univ. Leuven, BELGIUM), F. Verbeyst, M. Vanden Bossche (NMDG N.V., BELGIUM), D. Schreurs (Katholieke Univ. Leuven, BELGIUM)
  2. High Performance and Embedded Architecture and Compilation
    • Automatic Installation of Software-based Fault Tolerance Algorithms in Programs Generated by GCC Compiler, A. Piotrowski (Tech. Univ. Łódź, POLAND)
    • Enhancing the Grid Alu Processor for a Better Exploitation of the Functional Units, B. Shehan, R. Jahr, S. Uhrig, T. Ungerer (Univ. Augsburg, GERMANY)
    • Instructionless Processor Architecture Using Dynamically Reconfigurable Logic, R. Kiełbik, G. Jabłoński, B. Świercz, P. Amrozik (Tech. Univ. Łódź, POLAND)
    • Software Approach for Green Mobile Computing, A. Skurski, B. Świercz (Tech. Univ. Łódź, POLAND)
    • Trace-Based Runtime Analysis of Embedded Real-Time Systems, Z. Chamski (Infrasoft IT Solutions and Proximetry, POLAND), M. Borzęcki, B. Świercz (Proximetry and Tech. Univ. Łódź, POLAND)
  3. xTCA for Instrumentation
    • AMC Radiation Monitoring Module for ATCA/µTCA Based Low Level RF Control System, T. Kozak, D. Makowski (Tech. Univ. Łódź, POLAND)
    • AMC Timing Receiver and Clock Synthesizer Module for the LLRF System, K. Czuba, M. Ładno (Warsaw Univ. of Techn., POLAND)
    • Application for Management and Monitoring of xTCA Hardware, J. Wychowaniak, D. Makowski, P. Prędki, A. Napieralski (Tech. Univ. Łódź, POLAND)
    • ATCA Carrier Board with Dedicated IPMI Controller, P. Perek, D. Makowski, P. Prędki, A. Napieralski (Tech. Univ. Łódź, POLAND)
    • Design of Eight-channel ADC Card for GHz Signal Conversion, S. Bou Habib, K. Czuba (Warsaw Univ. of Techn., POLAND), W. Jałmużna (Tech. Univ. Łódź, POLAND), T. Jeżyński (DESY, GERMANY)
    • Integration of the ITER Diagnostics Plant Systems with CODAC, C. Hansalia, P. Makijarvi, R. Reichle, S. Simrock, G. Vayakis, I. Yonekawa, C. Walker, M. Walsh, A. Winter (ITER, FRANCE)
    • PCIExpress Hot-plug Mechanism in Linux-based ATCA Control Systems, A. Piotrowski, D. Makowski (Tech. Univ. Łódź, POLAND)
    • Power Supply Unit for ATCA-based Piezo Compensation System, K. Przygoda, T. Poźniak, D. Makowski, T. Kozak, M. Wisniewski, A. Napieralski (Tech. Univ. Łódź, POLAND), M. Grecki (DESY, GERMANY)
    • Sub-LSB DAC Resolution Enhancement Applied to LLRF Control, M. Grecki (DESY, GERMANY)

The following papers has been awarded:

  • Outstanding Paper Award was presented to:
    • A 11-bit, 12.5 MHz, Low Power Low Voltage Continuous-Time Sigma-Delta Modulator, E. Di Gioia, H. Klar (Tech. Univ. Berlin, GERMANY)
    • A Fast Method for Transistor Circuit Voltage Range Analysis Using Linear Programming, S. Höppner, S. Henker, R. Schüffny (Univ. of Techn. Dresden, GERMANY), A. Graupner (Zentrum Mikroelektronik Dresden AG, GERMANY)
    • An Energy Harvesting Circuit for Self-Powered Sensors, J. Fernandes (Tech. Univ. Lisbon and INESC-ID, PORTUGAL), M. Martins (INESC-ID, PORTUGAL), M. Piedade (Tech. Univ. Lisbon and INESC-ID, PORTUGAL)
    • CMOS Coupled Multivibrators for WMTS Applications, J. Casaleiro, H. Lopes, L. Oliveira (Univ. Nova Lisboa, PORTUGAL), I. Filanovsky (Univ. Alberta, CANADA)
    • Digitally Programmable Delay-Locked-Loop with Variable Charge Pump Current, B. Lopes (Univ. Nova Lisboa, PORTUGAL), N. Paulino, J. Goes, A. Steiger Garção (UNINOVA/CTS, PORTUGAL)
    • Digital Predistorter for 64QAM Modulation Based on FPGA Device, J. Pochmara, P. Katarzyński (Poznań Univ. of Techn., POLAND)
    • Image Sensor - based Fluorescence Detection for Microfluidical Chips, R. Walczak (Wrocław Univ. of Techn. and Institute of Elctron Techn., POLAND)
    • Lab-on-a-chip for Developmental Competence Assessment of Bovine Oocytes, R. Walczak, P. Szczepańska, J. Dziuban (Wrocław Univ. of Techn., POLAND), B. Kempisty, M. Jackowska, P. Antosik, J. Jaśkowski (Poznań Univ. of Life Sciences, POLAND), A. Chełmońska-Soyta (Polish Academy of Science, POLAND)
    • Modelling of Capacitor Mismatch and Non-Linearity Effects in Charge Redistribution SAR ADCs, S. Haenzsche, S. Henker, R. Schüffny (Univ. of Techn. Dresden, GERMANY)
    • Optimized Queue Based Communication in VLSI Using a Weakly Ordered Binary Heap, S. Scholze, S. Henker, J. Partzsch, C. Mayr, R. Schüffny (Univ. of Techn. Dresden, GERMANY)
    • Short-time Energy Buffering for Photovoltaic System, W. Marańda, M. Piotrowicz (Tech. Univ. Łódź, POLAND)
    • SiC Schottky Diode Electrothermal Macromodel, F. Masana (Tech. Univ. Catalonia, SPAIN)
    • Wavelet Energy-based Mahalanobis Distance Metric for Testing Analog and Mixed-Signal Circuits, M. Dimopoulos, A. Spyronasios, A. Hatzopoulos (Aristotle Univ. Thessaloniki, GREECE)
  • Poland Section IEEE ED Chapter Special Award was presented to:
    • Design Methodology for Synthetic Biosystems, M. Madec, C. Lallement, Y. Gendrault (InESS, FRANCE), J. Haiech (LIT, FRANCE)


Receipt of papers:

March 15th, 2024

Notification of acceptance:

April 30th, 2024

Registration opening:

May 1st, 2024

Final paper versions:

May 15th, 2024